FT7C168, FT7C169, FT7C170
HIGH SPEED 4K x 4
SRAM
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 12/15/20/25/35ns (Commercial)
– 20/25/35/45/55/70ns (FT7C168 Military)
Low Power Operation (Commercial)
– 715 mW Active
– 193 mW Standby (TTL Input)
FT7C168
– 83 mW Standby (CMOS Input)
FT7C168
Single 5V±10% Power Supply
Fully TTL Compatible, Common I/O Ports
Three Options
–
FT7C168
Low Power Standby Mode
–
FT7C169
Fast Chip Select Control
–
FT7C170
Fast Chip Select, Output Enable
Controls
Standard Pinout (JEDEC Approved)
–
FT7C168:
20-pin DIP, SOJ, LCC, SOIC,
CERPACK, and Flat Pack
–
FT7C169:
20-pin DIP and SOIC
–
FT7C170:
22-pin DIP
DESCRIPTION
The
FT7C168, FT7C169
and
FT7C170
are a family of
16,384-bit ultra high-speed static RAMs organized as 4K
x 4. All three devices have common input/output ports.The
FT7C168
enters the standby mode when the chip enable
(CE) control goes HIGH; with CMOS input levels, power
consumption is only 83mW in this mode. Both the
FT7C169
and the
FT7C170
offer a fast chip select access time that
is only 67% of the address access time. In addition, the
FT7C170
includes an output enable (OE) control to elimi-
nate data bus contention. The RAMs operate from a
single 5V ± 10% tolerance power supply.
Access times as fast as 12 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption to a low 715
mW active, 193 mW standby.
The
FT7C168
and
FT7C169
are available in 20-pin (FT7C170
in 22-pin) 300 mil DIP packages providing excellent
board level densities. The
FT7C168
is also available in 20-
pin 300 mil SOIC, SOJ, CERPACK, and Flat Pack
packages.
The
FT7C169
is also available in a 20-pin 300 mil SOIC
package.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
Only FT7C168
FT7C168
FT7C169
DIP (P2, C6, D2)
DIP (P2)
SOIC (S2)
SOIC (S2)
SOJ (J2)
CERPACK (F2)
SOLDER SEAL FLAT PACK (FS-2)
FT7C170
DIP (P3)d
CE Used On FT7C168 Also For Power Down Functions
CE Used On FT7C169 Fast Chip Select
OE Output Enable Function On FT7C170
1
Revised October 2006
FT7C168, FT7C169, FT7C170
MAXIMUM RATINGS
(1)
Symbol
V
CC
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND
(up to 7.0V)
Operating Temperature
Value
– 0.5 to +7
– 0.5 to
V
CC
+0.5
–55 to +125
Unit
V
Symbol
T
BIAS
T
STG
P
T
I
OUT
Parameter
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
– 55 to +125
– 65 to +150
1.0
50
Unit
°C
°C
W
mA
V
TERM
T
A
V
°C
RECOMMENDED OPERATING CONDITIONS
Grade
(2)
Commercial
Military
Ambient Temp
0°C to 70°C
–55°C to +125°C
Gnd
0V
0V
V
CC
5.0V ± 10%
5.0V ± 10%
CAPACITANCES
(4)
(V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Conditions Typ. Unit
V
IN
= 0V
5
7
pF
pF
Output Capacitance V
OUT
= 0V
DC ELECTRICAL CHARACTERISTICS
Symbol
V
IH
V
IL
V
HC
V
LC
V
CD
V
OL
V
OLC
V
OH
V
OHC
I
LI
I
LO
I
CC
I
SB
Parameter
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage
Output Low Voltage
(TTL Load)
Output Low Voltage
(CMOS Load)
Output High Voltage
(TTL Load)
Output High Voltage
(CMOS Load)
Input Leakage Current
Output Leakage Current
Dynamic Operating
Current
Standby Power Supply
Current (TTL Input Levels)
FT7C168
only
Standby Power
Supply Current
(CMOS Input Levels)
FT7C168
only
V
CC
= Min., I
IN
= –18 mA
I
OL
= +8 mA, V
CC
= Min.
I
OLC
= +100 µA, V
CC
= Min.
I
OH
= –4 mA, V
CC
= Min.
I
OHC
= –100 µA, V
CC
= Min.
V
CC
= Max., V
IN
= GND to V
CC
V
CC
= Max.,
CS
= V
IH
,
V
OUT
= GND to V
CC
Mil.
Comm’l
Mil.
Comm’l
2.4
V
CC
–0.2
–10
–5
–10
–5
___
___
Test Conditions
FT7C168/169/170
Min
2.2
–0.5(3)
V
CC
–0.2
–0.5(3)
Max
V
CC
+0.5
0.8
V
CC
+0.5
0.2
–1.2
0.4
0.2
Unit
V
V
V
V
V
V
V
V
V
+10
+5
+10
+5
130
35
µA
µA
mA
mA
V
CC
= Max., f = Max., Outputs Open
CE
≥
V
IH
, V
CC
= Max., f = Max.,
Outputs Open
CE
≥
V
HC
, V
CC
= Max., f = 0,
Outputs Open
V
IN
≤
V
LC
or V
IN
≥
V
HC
I
SB1
___
15
mA
Document #
SRAM107
REV A
Page 2 of 15
FT7C168, FT7C169, FT7C170
AC CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym
t
RC
t
AA
t
AC §
t
AC ‡
t
OH
t
LZ ‡
t
HZ †
t
OE†
t
OLZ †
t
OHZ †
t
RCS
t
RCH
t
PU §
t
PD §
Read Cycle Time
Parameter
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min Max Min Max
12
12
12
8
2
2
7
8
0
6
0
0
0
12
0
0
0
15
0
7
0
0
0
20
2
2
8
10
0
9
0
0
0
25
15
15
15
9
2
2
9
12
0
11
0
0
0
35
20
20
20
12
2
2
10
15
0
15
25
25
25
15
2
2
15
15
35
35
35
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
Chip Enable Access Time
Chip Select Access Time
Output Hold from Address Change
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Output Enable to Data Valid
Output Enable to Output in Low Z
Output Disable to Output in High Z
Read Command Setup Time
Read Command Hold Time
Chip Enable to Power Up Time
Chip Disable to Power Down Time
AC CHARACTERISTICS—READ CYCLE (CONTINUED)
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym
t
RC
t
AA
t
AC §
t
OH
t
LZ ‡
t
HZ †
t
RCS
t
RCH
t
PU §
t
PD §
Read Cycle Time
Parameter
-45
-55
-70
Min Max Min Max Min Max
45
45
45
2
2
25
0
0
0
45
0
0
0
55
2
2
25
0
0
0
70
55
55
55
2
2
30
70
70
70
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Read Command Setup Time
Read Command Hold Time
Chip Enable to Power Up Time
Chip Disable to Power Down Time
§
FT7C168
only
†
FT7C170
only
‡ Chip Select/Deselect for
FT7C169
and
FT7C170
Document #
SRAM107
REV A
Page 3 of 15
FT7C168, FT7C169, FT7C170
TIMING WAVEFORM OF READ CYCLE NO. 1 (ADDRESS CONTROLLED)
(5,6)
Notes:
5.
WE
is HIGH for READ cycle.
6.
CE/CS
and
OE
are LOW for READ cycle.
TIMING WAVEFORM OF READ CYCLE NO. 2 (CE
CS
CONTROLLED)
(5,7)
CE/CS
CE
TIMING WAVEFORM OF READ CYCLE NO. 3—FT7C170 ONLY (OE
CONTROLLED)
(5)
OE
Notes:
7. ADDRESS must be valid prior to, or coincident with
CE/CS
transition
low. For Fast
CS,
t
AA
must still be met.
8. Transition is measured ±200mV from steady state voltage prior to
change, with loading as specified in Figure 1.
9. Read Cycle Time is measured from the last valid address to the first
transitioning address.
Document #
SRAM107
REV A
Page 4 of 15
FT7C168, FT7C169, FT7C170
AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym
t
WC
t
cw
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
Write Cycle Time
Chip Enable Time to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time
Data Valid to End of Write
Data Hold Time
Write Enable to Output in High Z
Output Active from End of Write
0
Parameter
-12
-15
-20
-25
-35
Min Max Min Max Min Max Min Max Min Max
12
12
12
0
12
0
7
0
4
0
15
15
15
0
15
0
8
0
5
0
18
18
18
0
18
0
10
0
6
0
20
20
20
0
20
0
10
0
7
0
30
30
30
0
30
0
15
0
13
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE (CONTINUED)
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym
t
WC
t
cw
t
AW
t
AS
t
WP
t
AH
t
DW
t
DH
t
WZ
t
OW
Write Cycle Time
Chip Enable Time to End of Write
Address Valid to End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time
Data Valid to End of Write
Data Hold Time
Write Enable to Output in High Z
Output Active from End of Write
0
Parameter
-45
-55
-70
Min Max Min Max Min Max
45
40
40
0
40
0
20
3
20
0
55
50
50
0
50
0
20
3
25
0
70
60
60
0
60
0
25
3
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Document #
SRAM107
REV A
Page 5 of 15
京公网安备 11010802033920号
EEWORLD
