FEDL9060-01
¡ Semiconductor
FEDL9060-01
This version: Feb. 2001
This version: Mar. 1999
ML9060
¡ Semiconductor
ML9060
1/2 DUTY, 160-OUTPUT STATIC LCD DRIVER
GENERAL DESCRIPTION
The ML9060 consists of a 320-bit shift register, a 320-bit data latch, 160 sets of LCD drivers, and
a common signal generator circuit.
The LCD display data is input serially to the shift register from the DATA IN pin in
synchronization with the CLOCK IN signal, and is stored in the data latch by the LOAD IN
signal.
The LCD display data stored in the data latch is output via the LCD drivers.
A maximum of 160 segments of LCD can be driven in static display mode and a maximum of
320 segments can be driven directly in the 1/2 duty display mode.
It is possible to select the mode of using the internal oscillator circuit or the mode of using an
external clock for the common signal generator circuit. The ML9060 also outputs the sync signal
during the 1/2 duty display mode.
FEATURES
• Logic power supply
: 2.7 to 5.5V
• LCD Driving voltage : 4.5 to 16V
• Maximum number of segments that can be driven:
Static display mode
: 160 segments
1/2 Duty display mode : 320 segments
• Serial transfer clock
: 1 MHz max.
• The microcontroller interface consists of the three signals DATA IN, CLOCK IN, and LOAD
IN.
• An RC oscillator circuit is built in which can use either an external resistor or the internal
resistor.
• Cascade connection of several ICs is possible. (Max. 3 chips)
• Built-in common signal generator circuit.
• Built-in common output mid-level voltage generator circuit.
• Input for turning all segments ON is available (SEG-TEST IN).
• Input for turning all segments OFF is available (BLANK IN).
• Gold bump chip
Product name: ML9060DVWA
1/19
FEDL9060-01
¡ Semiconductor
ML9060
BLOCK DIAGRAM
SEG1 SEG2
V
LCD
SEG160
COM A
COM B
Segment Drivers
1/2VLCD Generator
& Common Drivers
SEG-TEST OUT
BLANK OUT
SEG-TEST IN
BLANK IN
V
DD
DS01 DS02
DS0160
DSI1b
DSI160b
Data Selector
DSI1a
DSI160a
L01a
L0160a
L01b
L0160b
Data Latch A
LI1a
LI160a
Data Latch B
LI1b
LI160b
LOAD IN
DATA IN
P01a
SIa
P0160a
SOa
P01b
SIb
P0160b
SOb
LOAD OUT
Shift Register A
CLOCK IN
Shift Register B
DATA OUT
CLOCK OUT
Timing Generator
COM OUT
OSC I/E
D/S
OSC1
OSCR
OSC2
M/S
SYNC
GND
SYNC
OSC
1/64 or 1/128
1/2
2/19
FEDL9060-01
¡ Semiconductor
ML9060
ABSOLUTE MAXIMUM RATINGS
Parameter
Logic power supply voltage
LCD Driving voltage
Input voltage
Storage temperature
Symbol
V
DD
V
LCD
V
I
T
STG
Condition
Ta = 25°C
Ta = 25°C
Ta = 25°C
—
Rating
–0.3 to +6.5
0 to 18
GND–0.3 to V
DD
+0.3
–55 to +150
Unit
V
V
V
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Logic power supply voltage
LCD Driving voltage
Junction operating
temperature
Symbol
V
DD
*
V
LCD
*
T
jop
Condition
—
—
—
Range
2.7 to 5.5
4.5 to 16
–40 to +85
Unit
V
V
°C
*: Use with V
DD
≤
V
LCD
Note: Never place a short between an output pin and another output pin or between an output
pin and other pins (input pins, I/O pins, or power supply pins).
: In order to prevent mdlfunctioning of the device, turn on the logic power supply first and
then turn on the LCD driving power supply, and also turn off the LCD driving power
supply and then turn off the logic power supply.
3/19
FEDL9060-01
¡ Semiconductor
ML9060
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter
"H" Input voltage
Symbol
V
IH1
*1
V
IH2
*2
V
IL1
*1
V
IL2
*2
I
L1
—
Condition
(VDD = 2.7 to 5.5V, VLCD = 4.5 to 16V, Tj = –40 to +85°C)
Min.
Typ.
Max. Unit Applicable pin
0.7V
DD
0.8V
DD
GND
GND
—
—
—
—
—
—
V
DD
V
DD
0.3V
DD
0.2V
DD
±1.0
V
DATA IN
CLOCK IN
LOAD IN
V
mA
SEG-TEST IN
BLANK IN
M/S, D/S
OSC1, OSC I/E
SYNC
SEG1 to SEG160
COM A, COM B
DATA OUT
CLOCK OUT
"H" Output
voltage
Logic
LOAD OUT
V
OHL1
I
O
= –100mA
0.9V
DD
—
—
V
SEG-TEST OUT
BLANK OUT
COM OUT
SYNC
V
OHL2
"M" Output
voltage
Common
Segment
Common
I
O
= –200mA
0.9V
DD
1/2V
LCD
–0.15
—
—
—
1/2V
LCD
—
—
—
1/2V
LCD
+0.15
0.2
0.2
V
V
V
V
OSC2
COM A, COM B
SEG1 to SEG160
COM A, COM B
DATA OUT
CLOCK OUT
"L" Output
voltage
Logic
LOAD OUT
V
OLL1
I
O
= 100mA
—
—
0.1V
DD
V
SEG-TEST OUT
BLANK OUT
COM OUT
SYNC
V
OLL2
Output
resistance
Segment
Common
R
SEG
R
COM
I
O
= 200mA
—
—
—
—
—
—
0.1V
DD
10
1.5
V
kW
kW
OSC2
SEG1 to SEG160
COM A, COM B
"L" Input voltage
Input leakage current 1
—
V
I
= V
DD
or 0V
V
I
= V
DD
or 0V
Input leakage current 2
Segment
Common
I
L2
V
OHS
V
OHC
*3
D/S = "H"
M/S = "L"
I
O
= –30mA
I
O
= –150mA
—
V
LCD
–0.2
V
LCD
–0.2
—
—
—
±10
—
—
mA
V
V
V
OMC
*3 I
O
=
±150mA
V
OLS
V
OLC
*3
I
O
= 30mA
I
O
= 150mA
"M": Middle level
4/19
FEDL9060-01
¡ Semiconductor
ML9060
Parameter
Symbol
Condition
D/S = "L" (Static)
Fix other input levels
at either "H" or "L"
Oscillator stopped
No load
D/S = "H" (1/2duty)
Fix other input levels
at either "H" or "L"
Oscillator stopped
No load
D/S = "L" (Static)
Fix other input levels
at either "H" or "L"
Oscillator stopped
No load
D/S = "H" (1/2duty)
Fix other input levels
at either "H" or "L"
Oscillator stopped
No load
V
DD
= 5.5V
D/S = "L" (Static)
OSC1 is Open
OSC2 is connected to OSCR
Other inputs are "H" or "L"
No load
V
DD
= 5.5V
D/S = "H" (1/2duty)
OSC1 is Open
OSC2 is connected to OSCR
Other inputs are "H" or "L"
No load
V
DD
= 5.5V
D/S = "L" (Static)
OSC1 is Open
OSC2 is connected to OSCR
Other inputs are "H" or "L"
No load
V
DD
= 5.5V
D/S = "H" (1/2duty)
OSC1 is Open
OSC2 is connected to OSCR
Other inputs are "H" or "L"
No load
Min.
Typ.
Max.
Unit
Applicable
pin
I
DDS1
—
—
30
mA
V
DD
I
DDS2
Static supply current
—
—
30
mA
V
DD
I
LCDS1
—
—
30
mA
V
LCD
I
LCDS2
—
—
900
mA
V
LCD
I
DD1
—
—
3
mA V
DD
I
DD2
—
—
3
mA V
DD
Dynamic supply current *4
I
LCD1
—
—
200
mA
V
LCD
I
LCD2
—
—
1
mA V
LCD
*1: Applicable to the DATA IN, LOAD IN, SEG-TEST IN, M/S, D/S, and OSC I/E pins.
*2: Applicable to the CLOCK IN, OSC1, and BLANK IN pins.
*3: Applicable to the voltage drop when the current flows into or out of one COM pin.
*4: The LCD display data of “0” and “1” are input alternately.
5/19
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