CMOS 32-BIT SINGLE CHIP MICROCOMPUTER
S1C33E08
Technical Manual
NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written permission
of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not
assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or
use in any product or circuit and, further, there is no representation that this material is applicable to products requir-
ing high level reliability, such as medical products. Moreover, no license to any intellectual property rights is granted by
implication or otherwise, and there is no representation or warranty that anything made in accordance with this mate-
rial will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain
technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade
Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval
from another government agency.
The EPSON S1C33E08 incorporates MP3 technology of which Thomson SA in France holds the patent.
Manufacturers using the EPSON S1C33E08 to develop MP3 products must pay royalties to Thomson SA in order to
procure the license for the MP3 technology.
©
SEIKO EPSON CORPORATION
2007, All rights reserved.
Configuration of product number
Devices
S1
C
33209
F
00E1
00
Packing specifications
00 : Besides tape & reel
0A : TCP BL
2 directions
0B : Tape & reel BACK
0C : TCP BR
2 directions
0D : TCP BT
2 directions
0E : TCP BD
2 directions
0F : Tape & reel FRONT
0G : TCP BT
4 directions
0H : TCP BD
4 directions
0J : TCP SL
2 directions
0K : TCP SR
2 directions
0L : Tape & reel LEFT
0M : TCP ST
2 directions
0N : TCP SD
2 directions
0P : TCP ST
4 directions
0Q : TCP SD
4 directions
0R : Tape & reel RIGHT
99 : Specs not fixed
Specification
Package
D: die form; F: QFP, B: BGA
Model number
Model name
C: microcomputer, digital products
Product classification
S1: semiconductor
Development tools
S5U1
C
33000
H2
1
00
Packing specifications
00: standard packing
Version
1: Version 1
Tool type
Hx : ICE
Dx : Evaluation board
Ex : ROM emulation board
Mx : Emulation memory for external ROM
Tx : A socket for mounting
Cx : Compiler package
Sx : Middleware package
Corresponding model number
33L01: for S1C33L01
Tool classification
C: microcomputer use
Product classification
S5U1: development tool for semiconductor products
S1C33E08 Technical Manual
I S1C33E08 SPECIFICATIONS
I.1
I.2
I.3
I.4
I.5
I.6
I.7
I.8
I.9
II.1
II.2
II.3
II.4
III.1
III.2
III.3
III.4
Overview
Block Diagram
Pin Description
Power Supply
CPU Core and Bus Architecture
Memory Map
Electrical Characteristics
Basic External Wiring Diagram
Precautions on Mounting
High-Speed DMA (HSDMA)
Intelligent DMA (IDMA)
SRAM Controller (SRAMC)
SDRAM Controller (SDRAMC)
Clock Management Unit (CMU)
Interrupt Controller (ITC)
Real-Time Clock (RTC)
Misc Registers
I
Overview
Block
Pin
Power
CPU
Map
E char
Wiring
Mount
II BUS MODULES
II
HSDMA
IDMA
SRAMC
SDRAMC
III PERIPHERAL MODULES
1
(SYSTEM)
III
CMU
ITC
RTC
MISC
IV PERIPHERAL MODULES
2
(TIMERS)
IV.1
16-Bit
Timers (T16)
IV.2 Watchdog Timer (WDT)
IV
T16
WDT
V PERIPHERAL MODULES
3
(INTERFACE)
V.1
V.2
V.3
V.4
V.5
General-Purpose Serial Interface (EFSIO)
Serial Peripheral Interface (SPI)
Direction Control Serial Interface (DCSIO)
Card Interface (CARD)
I
2
S Interface (I
2
S)
V
EFSIO
SPI
DCSIO
CARD
I
2
S
VI PERIPHERAL MODULES
4
(PORTS)
VI.1 General-Purpose I/O Ports (GPIO)
VI.2 Extended General-Purpose I/O Ports (EGPIO)
VI
GPIO
EGPIO
VII PERIPHERAL MODULES
5
(ANALOG)
VII.1 A/D Converter (ADC)
VII
ADC
VIII PERIPHERAL MODULES
6
(LCD)
VIII.1 LCD Controller (LCDC)
VIII.2 IVRAM and IVRAM Arbiter
VIII
LCDC
IVRAM
IX PERIPHERAL MODULES
7
(USB)
IX.1 USB Function Controller (USB)
IX
USB
X PERIPHERAL MODULES
8
(MP3)
X.1 MP3 Decoder (MP3)
X
MP3
APPENDIX
A
B
C
D
E
F
I/O Map
Differences Between C33 PE Core and Other C33 Core
Development Tools
Boot
Summary of Precautions
Supplementary Description for Clock Control
AP
I/Omap
C33PE
DEV
Boot
Notes
Clock