D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
1 Amp/1.5 Amp/2 Amp Synchronous,
Step-Down DC-to-DC Converters
ADP2105/ADP2106/ADP2107
FEATURES
Extremely high 97% efficiency
Ultralow quiescent current: 20 μA
1.2 MHz switching frequency
0.1 μA shutdown supply current
Maximum load current
ADP2105: 1 A
ADP2106: 1.5 A
ADP2107: 2 A
Input voltage: 2.7 V to 5.5 V
Output voltage: 0.8 V to V
IN
Maximum duty cycle: 100%
Smoothly transitions into low dropout (LDO) mode
Internal synchronous rectifier
Small 16-lead 4 mm × 4 mm LFCSP_VQ package
Optimized for small ceramic output capacitors
Enable/shutdown logic input
Undervoltage lockout
Soft start
GENERAL DESCRIPTION
The ADP2105/ADP2106/ADP2107 are low quiescent current,
synchronous, step-down dc-to-dc converters in a compact 4 mm ×
4 mm LFCSP_VQ package. At medium to high load currents,
these devices use a current mode, constant frequency pulse-
width modulation (PWM) control scheme for excellent stability
and transient response. To ensure the longest battery life in portable
applications, the ADP2105/ADP2106/ADP2107 use a pulse
frequency modulation (PFM) control scheme under light load
conditions that reduces switching frequency to save power.
The ADP2105/ADP2106/ADP2107 run from input voltages of
2.7 V to 5.5 V, allowing single Li+/Li− polymer cell, multiple
alkaline/NiMH cells, PCMCIA, and other standard power sources.
The output voltage of ADP2105/ADP2106/ADP2107 is adjustable
from 0.8 V to the input voltage (indicated by ADJ), whereas the
ADP2105/ADP2106/ADP2107 are available in preset output
voltage options of 3.3 V, 1.8 V, 1.5 V, and 1.2 V (indicated by x.x V).
Each of these variations is available in three maximum current
levels: 1 A (ADP2105), 1.5 A (ADP2106), and 2 A (ADP2107). The
power switch and synchronous rectifier are integrated for minimal
external part count and high efficiency. During logic controlled
shutdown, the input is disconnected from the output, and it
draws less than 0.1 μA from the input source. Other key features
include undervoltage lockout to prevent deep battery discharge
and programmable soft start to limit inrush current at startup.
100
V
IN
= 3.3V
95
V
IN
= 3.6V
V
OUT
= 2.5V
APPLICATIONS
Mobile handsets
PDAs and palmtop computers
Telecommunication/networking equipment
Set top boxes
Audio/video consumer electronics
TYPICAL OPERATING CIRCUIT
0.1μF
10Ω
V
IN
INPUT VOLTAGE = 2.7V TO 5.5V
10μF
FB
16
15
14
13
EFFICIENCY (%)
ON
OFF
1
EN
FB
GND
IN
PWIN1
LX2
12
PGND
11
OUTPUT VOLTAGE = 2.5V
2μH
90
V
IN
= 5V
85
2
GND
3
GND
4
GND
ADP2107-ADJ
LX1
10
PWIN2
9
SS
6
85kΩ
FB
V
IN
40kΩ
10μF
10μF
4.7μF
80
COMP
5
AGND NC
7
8
LOAD
0A TO 2A
75
0
200
400
600
800
1000 1200 1400 1600 1800 2000
70kΩ
120pF
1nF
LOAD CURRENT (mA)
NC = NO CONNECT
Figure 1. Circuit Configuration of ADP2107 with V
OUT
= 2.5 V
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
06079-002
Figure 2. Efficiency vs. Load Current for the ADP2107 with V
OUT
= 2.5 V
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2006–2008 Analog Devices, Inc. All rights reserved.
06079-001
ADP2105/ADP2106/ADP2107
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Typical Operating Circuit ................................................................ 1
Revision History ............................................................................... 2
Functional Block Diagram .............................................................. 3
Specifications..................................................................................... 4
Absolute Maximum Ratings............................................................ 6
Thermal Resistance ...................................................................... 6
Boundary Condition .................................................................... 6
ESD Caution .................................................................................. 6
Pin Configuration and Function Descriptions ............................. 7
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 14
Control Scheme .......................................................................... 14
PWM Mode Operation.............................................................. 14
PFM Mode Operation................................................................ 14
Pulse-Skipping Threshold ......................................................... 14
100% Duty Cycle Operation (LDO Mode) ............................. 14
Slope Compensation .................................................................. 15
Design Features ........................................................................... 15
Applications Information .............................................................. 16
External Component Selection ................................................ 16
Setting the Output Voltage ........................................................ 16
Inductor Selection ...................................................................... 17
Output Capacitor Selection....................................................... 18
Input Capacitor Selection .......................................................... 18
Input Filter................................................................................... 19
Soft Start Period.......................................................................... 19
Loop Compensation .................................................................. 19
Bode Plots .................................................................................... 20
Load Transient Response .......................................................... 21
Efficiency Considerations ......................................................... 22
Thermal Considerations............................................................ 22
Design Example .............................................................................. 24
External Component Recommendations .................................... 25
Circuit Board Layout Recommendations ................................... 27
Evaluation Board ............................................................................ 28
Evaluation Board Schematic for ADP2107 (1.8 V) ............... 28
Recommended PCB Board Layout (Evaluation Board Layout)
....................................................................................................... 28
Application Circuits ....................................................................... 30
Outline Dimensions ....................................................................... 33
Ordering Guide .......................................................................... 33
REVISION HISTORY
9/08—Rev. B to Rev. C
Changes to Table Summary Statement .......................................... 4
Changes to LX Minimum On-Time Parameter, Table 1 ............. 5
7/08—Rev. A to Rev. B
Changes to General Description Section ...................................... 1
Changes to Figure 3 .......................................................................... 3
Changes to Table 1 ............................................................................ 4
Changes to Table 2 ............................................................................ 6
Changes to Figure 4 .......................................................................... 7
Changes to Table 4 ............................................................................ 7
Changes to Figure 26 ...................................................................... 11
Changes to Figure 31 Through Figure 34 .................................... 12
Changes to Figure 35 ...................................................................... 13
Changes to PMW Mode Operation Section and Pulse Skipping
Threshold Section ........................................................................... 14
Changes to Slope Compensation Section .................................... 15
Changes to Setting the Output Voltage Section ........................ 16
Changes to Figure 37 ...................................................................... 16
Changes to Inductor Selection Section........................................ 17
Changes to Input Capacitor Selection Section ........................... 18
Changes to Figure 47 through Figure 52 ..................................... 21
Changes to Transition Losses Section and Thermal
Considerations Section .................................................................. 22
Changes to Table 11 ....................................................................... 25
Changes to Circuit Board Layout Recommendations Section..27
Changes to Table 12 ....................................................................... 26
Changes to Figure 53...................................................................... 28
Changes to Figure 56 Through Figure 57.................................... 30
Changes to Figure 58 Through Figure 59.................................... 31
Changes to Outline Dimensions .................................................. 33
3/07—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Output Characteristics and
LX (Switch Node) Characteristics Sections ...................................3
Changes to Typical Performance Characteristics Section ...........7
Changes to Load Transient Response Section ............................ 21
7/06—Revision 0: Initial Version
Rev. C | Page 2 of 36
ADP2105/ADP2106/ADP2107
FUNCTIONAL BLOCK DIAGRAM
COMP
5
SOFT
START
REFERENCE
0.8V
14
IN
9
PWIN2
SS
6
CURRENT SENSE
AMPLIFIER
13
PWIN1
FB
16
FB
16
GM ERROR
AMP
PWM/
PFM
CONTROL
FOR PRESET
VOLTAGE
OPTIONS ONLY
CURRENT
LIMIT
AGND
7
GND
2
GND
3
GND
4
NC
8
GND
15
DRIVER
AND
ANTI-
SHOOT
THROUGH
10
LX1
12
LX2
SLOPE
COMPENSATION
OSCILLATOR
ZERO CROSS
COMPARATOR
EN
1
THERMAL
SHUTDOWN
11
PGND
Figure 3.
Rev. C | Page 3 of 36
06079-037
ADP2105/ADP2106/ADP2107
SPECIFICATIONS
V
IN
=
3.6 V @ T
A
= 25°C, unless otherwise noted.
1
Table 1.
Parameter
INPUT CHARACTERISTICS
Input Voltage Range
Undervoltage Lockout Threshold
Min
2.7
2.4
2.2
2.2
2.0
Undervoltage Lockout Hysteresis
OUTPUT CHARACTERISTICS
Output Regulation Voltage
2
Typ
Max
5.5
2.6
2.5
Unit
V
V
V
V
V
mV
V
V
V
V
V
V
V
V
V
V
V
V
%/A
%/A
%/A
%/V
%/V
V
V
V
μA
μA
μA
μA
μA
μA
μA
μA
μA
Conditions
−40°C ≤ T
J
≤ +125°C
V
IN
rising
V
IN
rising, −40°C ≤ T
J
≤ +125°C
V
IN
falling
V
IN
falling, −40°C ≤ T
J
≤ +125°C
V
IN
falling
3.3 V, load = 10 mA
3.3 V, V
IN
= 3.6 V to 5.5 V, no load to full load
3.3 V, V
IN
= 3.6 V to 5.5 V, no load to full load,
−40°C ≤ T
J
≤ +125°C
1.8 V, load = 10 mA
1.8 V, V
IN
= 2.7 V to 5.5 V, no load to full load
1.8 V, V
IN
= 2.7 V to 5.5 V, no load to full load,
−40°C ≤ T
J
≤ +125°C
1.5, load = 10 mA
ADP210x-1.5 V, V
IN
= 2.7 V to 5.5 V, no load to full load
ADP210x-1.5 V, V
IN
= 2.7 V to 5.5 V, no load to full load,
−40°C ≤ T
J
≤ +125°C
1.2 V, load = 10 mA
1.2 V, V
IN
= 2.7 V to 5.5 V, no load to full load
1.2 V, V
IN
= 2.7 V to 5.5 V, no load to full load,
−40°C ≤ T
J
≤ +125°C
ADP2105
ADP2106
ADP2107
ADP2105, measured in servo loop
ADP2106 and ADP2107, measured in servo loop
ADJ
ADJ
ADJ, −40°C ≤ T
J
≤ +125°C
ADJ, −40°C ≤ T
J
≤ +125°C
1.2 V output voltage
1.2 V output voltage, −40°C ≤ T
J
≤ +125°C
1.5 V output voltage
1.5 V output voltage, −40°C ≤ T
J
≤ +125°C
1.8 V output voltage
1.8 V output voltage, −40°C ≤ T
J
≤ +125°C
3.3 V output voltage
3.3 V output voltage, −40°C ≤ T
J
≤ +125°C
200
3.267
3.201
1.782
1.746
1.485
1.455
1.188
1.164
1.2
1.2
1.5
1.5
1.8
1.8
3.3
3.3
3.333
3.399
1.818
1.854
1.515
1.545
1.212
1.236
0.4
0.5
0.6
0.1
0.1
0.8
0.8
0.784
−0.1
3
6
4
8
5
10
10
20
0.816
+0.1
Load Regulation
Line Regulation
3
Output Voltage Range
FEEDBACK CHARACTERISTICS
FB Regulation Voltage
FB Bias Current
0.33
0.3
V
IN
Rev. C | Page 4 of 36