Logic Gates DUAL 2Input Pos AND GATE
| Parameter Name | Attribute value |
| Is it lead-free? | Lead free |
| Is it Rohs certified? | conform to |
| Maker | Texas Instruments |
| Parts packaging code | SOIC |
| package instruction | VSSOP, TSSOP8,.12,20 |
| Contacts | 8 |
| Reach Compliance Code | unknow |
| series | AUC |
| JESD-30 code | R-PDSO-G8 |
| JESD-609 code | e4 |
| length | 2.3 mm |
| Load capacitance (CL) | 15 pF |
| Logic integrated circuit type | AND GATE |
| MaximumI(ol) | 0.005 A |
| Humidity sensitivity level | 1 |
| Number of functions | 2 |
| Number of entries | 2 |
| Number of terminals | 8 |
| Maximum operating temperature | 85 °C |
| Minimum operating temperature | -40 °C |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | VSSOP |
| Encapsulate equivalent code | TSSOP8,.12,20 |
| Package shape | RECTANGULAR |
| Package form | SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH |
| method of packing | TR |
| Peak Reflow Temperature (Celsius) | 260 |
| power supply | 1.2/2.5 V |
| Prop。Delay @ Nom-Su | 3 ns |
| propagation delay (tpd) | 3 ns |
| Certification status | Not Qualified |
| Schmitt trigger | NO |
| Maximum seat height | 0.9 mm |
| Maximum supply voltage (Vsup) | 2.7 V |
| Minimum supply voltage (Vsup) | 0.8 V |
| Nominal supply voltage (Vsup) | 1.2 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | INDUSTRIAL |
| Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Terminal form | GULL WING |
| Terminal pitch | 0.5 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 2 mm |
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