DSC-10510
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®
7 VA DIGITAL-TO-SYNCHRO (D/S)
CONVERTER
FEATURES
•
7 VA Drive Capability for CT, CDX, or
TR Loads
•
Double Buffered Transparent Input
Latch
•
16-Bit Resolution
•
Up to 2 Minute Accuracy
•
Power Amplifier Uses Pulsating or DC
Supplies
•
Built-In-Test (BIT) Output
DESCRIPTION
The DSC-10510 is a high power Digital-to-Synchro converter, with
16-bit resolution and up to ±2 minute accuracy. The DSC-10510 is
capable of driving multiple Control Transformer (CT), Control Differential
Transmitter (CDX) and Torque Receiver (TR) loads up to 7 VA.
The DSC-10510 contains a high accuracy D/R converter, a triple power
amplifier stage, a walk-around circuit (to prevent torque receiver
hangups), and thermal and over-current protection circuits. The hybrid
is protected against overloads, load transients, over-temperature, loss
of reference, and power amplifier or DC power supply shutdown.
Microprocessor compatibility is provided through a 16-bit/2-byte dou-
ble-buffered input latch. Data input is natural binary angle in TTL
compatible parallel positive logic format.
Packaged in a 40-pin TDIP, the DSC-10510 features a power stage that
may be driven by either a standard ±15 VDC supply or by a pulsating
reference supply when used with an optional power transformer. When
powered by the reference source, heat dissipation is reduced by 50%.
APPLICATIONS
The DSC-10510 can be used where digitized shaft angle data must be
converted to an analog format for driving CT’s, CDX’s, and TR loads.
With its double buffered input latches, the DSC-10510 easily interfaces
with microprocessor based systems such as flight simulators, flight
instrumentation, fire control systems, and flight data computers.
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7771
©
M
1986, 1999 Data Device Corporation
DDC Custom Monolithics utilized in this product are copyright
under the Semiconductor Chip Protection Act.
Data Device Corporation
www.ddc-web.com
RH
26 V
REF
RL
18
100k
17
RH'
3.4 V
REF
RL'
13k
35
13k
34
-
+
100k
R
36
+15 VDC
30
-15 VDC
29
SIN
+V OR +15 V
23
-V OR -15 V
24
REMOTE
SENSE
19 S1'
20 S1
S1
-R
D/R CONVERTER
HIGH ACCURACY
LOW SCALE FACTOR
VARIATION
COS
ELECTRONIC SCOTT-T
& TRIPLE POWER
AMPLIFIER
25 S2'
21 S2
26 S3'
22 S3
S3
S2
DELAY
OVER-CURRENT
WALK AROUND CIRCUIT
POWER STAGE
ENABLE
±15 VDC
-R
THERMAL SENSE
140
˚
CASE
39
2
TRANSPARENT
LATCH
TRANSPARENT
LATCH
28
31
LA
33
LM
1-8
BITS 1-8
9-16 32
BITS 9-16
LL
±15 VDC
-R
37
40
K
EN
BIT
38
BS
DSC-10510
L-05/04-0
FIGURE 1. DSC-10510 BLOCK DIAGRAM
TABLE 1. DSC-10510 SPECIFICATIONS
PARAMETER
RESOLUTION
ACCURACY
DIFFERENTIAL LINEARITY
OUTPUT SETTLING TIME
DIGITAL INPUT/OUTPUT
Logic Type
Digital Inputs
Loading
K
Digital Outputs
BIT
Drive Capability
REFERENCE INPUT
Type
Logic 0 = 1 TTL Load
Logic 1 = 10 TTL Loads
26 Vrms differential
3.4 Vrms differential
72.8 Vrms for RH - RL
9.52 Vrms for RH' - RL'
DC to 1 kHz
100k Ohms ±0.5%
13k Ohms ±0.5%
200k Ohms ±0.5%
26k Ohms ±0.5%
RH - RL
RH' - RL'
RH - RL
RH' - RL'
VALUE
16 bits
±2 or 4 minutes
1 LSB max in the 16th bit
40 µs max
For any digital input step change (passive loads)
TTL/CMOS compatible
All inputs except K
(Kick pin 40)
Bits 1 - 16, BS, and EN
LL, LM, and LA (CMOS transient protected)
Ground to enable Kick circuit, open to disable; pulls self up to +15V.
Bit 1 = MSB, Bit 16 = LSB
(Note 1)
DESCRIPTION
Logic 0 = 0.8 V max
Logic 1 = 2.0 V min
20 µA max to GND//5pf max
20 µA max to +5V//5pf max
20 µA max
Logic 0 for BIT condition (see BIT pin function)
1.6mA at 0.4V max
0.4mA at 2.8V min
RH - RL
RH' - RL'
Max Voltage w/o Damage
Frequency
Input Impedance
Single Ended
Differential
SYNCHRO OUTPUT
Voltage L-L
Scale Factor Variation
Current
CT, CDX or TR Load
DC Offset
Protection
11.8 Vrms ±0.5% for nom Ref V
±0.1% max
Simultaneous amplitude variation on all output lines as a function of digi-
tal angle.
700 mA rms max
7 VA max
±15 mV max
Each line to ground. Varies with angle.
Output protected from overcurrent, voltage feedback transient, and over
temperature, loss of reference, loss of power amplifier, and loss of ±DC
supply voltage.
±V
20 V peak max,
3 V above output min
18V
25 V
25 mA max
load dependent
±15 V
±5%
POWER SUPPLY CHARACTERISTICS
Nominal Voltage
Voltage Range
Max Voltage w/o Damage
Current
TEMPERATURE RANGES
Operating (Case)
-3XX
-1XX
Storage
PHYSICAL CHARACTERISTICS
Size
Weight
Note 1:
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
2.0 x 1.1 x 0.2 inches
(50.8 x 27.9 x 5.1 mm)
0.9 oz
(25.5 g)
40 Pin Triple DIP
DSC-10510-303 accuracy = ±4 minutes (No Load) + 1.6 minutes at full load (7 VA Inductive)
DSC-10510-304 accuracy = ±2 minutes (No Load) + 1.6 minutes at full load (7 VA Inductive)
Data Device Corporation
www.ddc-web.com
3
DSC-10510
L-05/04-0
INTRODUCTION
SYSTEM CONSIDERATIONS:
POWER SURGE AT TURN ON
The output power stages can fully turn on before all the supplies
stabilize, when power is initially applied. Multiple D/S converters
with substantial loads can cause the system power supply to
have difficulty coming up and may even cause the supply to shut
down. It is important that the power supply can handle the turn-
on surge or that the D/S turn-ons be staggered. Typically, the
surge will be twice the max rated draw of the converter.
POWER SUPPLY CYCLING
Power supply cycling of the DSC-10510 should follow the guide-
lines below to avoid any potential problems.
Strictly maintain proper sequencing of supplies and signals per
typical CMOS circuit guidelines:
- Apply power supplies first (+15, -15V and ground).
- Apply digital control signals next.
- Apply analog signals last.
The reverse sequence should be followed during power down of
the circuit.
It is also recommended that the KICK pin, if unused, be left in the
“No Connection” (N/C) state. The internal pull up will disable the
pin (this removes any unnecessary voltages from the converter).
TORQUE LOAD MANAGEMENT
The above problems are compounded by the high power levels
involved when multiple torque loads (TR) are being driven. In this
configuration, power supply fold back problems are common
unless the stagger technique is used. The load will also need
time to stabilize. On turn-on it is likely that some of output loads
will be at a different angle than the D/S output. As the angular dif-
ference increases so does the power draw until the difference is
180 degrees. At this point the load impedance drops to Zss and
current draw is at a maximum.
PULSATING POWER SUPPLIES
D/S and D/R converters have been designed to operate their out-
put power stages with pulsating power to reduce power dissipa-
tion and power demand from regulated supplies. Figures 2 and 3
illustrate this technique. The power output stage is only supplied
with enough instantaneous voltage to be able to drive the
required instantaneous signal level. The AC reference can be full
wave rectified and applied to the push-pull output drivers since
the output signal is required to be in phase with the AC refer-
ence. The supply voltage will be just a few volts more than the
output signal and internal power dissipation is minimized.
6
3.4V rms
7
3
4
21.6V rms
C.T.
+
C1
+
D4
D3
C2
-V
GND
RL'
+V
D2
RH'
S1'
S1
S2'
S2
S3'
S3
S1
1
REFERENCE
SOURCE
26V rms 400Hz 2
T1
42359
+v
+DC SUPPLY LEVEL
POSITIVE PULSATING
SUPPLY VOLTAGE
AMPLIFIER OUTPUT
VOLTAGE ENVELOPE
D1
5
S2
S3
DSC10510
NEGATIVE PULSATING
SUPPLY VOLTAGE
DIGITAL
INPUT
NOTES:
PARTS LIST FOR 400Hz
D1, D2, D3, D4 = 1N4245
C1 AND C2 = 47µF, 35V DC CAPACITOR
±15VDC
-v
-DC SUPPLY LEVEL
FIGURE 2. TYPICAL CONNECTION DIAGRAM
UTILIZING PULSATING POWER SOURCE
FIGURE 3. PULSATING POWER SUPPLY VOLTAGE
WAVEFORMS
Data Device Corporation
www.ddc-web.com
4
DSC-10510
L-05/04-0
+15VDC
LIGHT LOAD
HEAVY LOAD
current therefore is 7VA/10.2 V = 0.68 A rms. The output is L-L
push-pull, that is, all the current flows from the positive supply
out to the load and back to the negative supply. The power input
is the DC voltage times the average current or 30 V x (0.68 A x
0.635/0.707) [avg/rms] = 18.32 Watts.
The power dissipated by the output driver stage is over 18 Watts
shared by the six power transistors. Since one synchro line sup-
plies all the current while the other two share it equally, one will
dissipate 2/3 of the power and the other two will each dissipate
1/3. There are 2 transistors per power stage so each of the two
transistors dissipates 1/3 of the power and the other transistors
dissipate 1/6 of the power. This results in a maximum power in
any one transistor of 1/3 x 18.32 W = 6.04 Watts. The heat rise
from the junction to the outside of the package, assuming a ther-
mal impedance of 4°C per watt = 24.16°C. At an operating case
temperature of 125°C the maximum junction temperature will be
149.16°C.
The other extreme condition to consider is when the output volt-
age is 11.8 V. The current then will be 0.42 Amps and the power
will be 30 x (0.42A x 0.635/0.707) = 11.32 Watts. A similar cal-
culation will show the maximum power per transistor to be 2.3
Watts. This is much less than when the output voltage is 10.2 V.
For
Pulsating Supplies
the analysis is much more difficult.
Calculations for a purely reactive load with DC supplies equal to
the output voltage peak vs. pulsating supplies with a supply volt-
age equal to the output voltage yield
an exact halving of the
power dissipated.
At light loads the pulsating supplies approxi-
mate DC supplies and at heavy loads, which is the worst case,
they approximate a pulsating supply as shown in Figure 4.
Advantages of the pulsating supply technique are:
• Reduced load on the regulated ±15 VDC supplies
• Halving of the total power
-15VDC
FIGURE 4. LOADED WAVEFORMS
THERMAL CONSIDERATIONS
Power dissipation in D/S and D/R circuits is dependent on the
load, whether active (TR) or passive (CT or CDX), and the power
supply, whether DC or pulsating. With inductive loads virtually all
the power consumed will have to be dissipated in the output
amplifiers. This can require considerable care in heat sinking.
Example:
For illustrative purposes the following thermal calculations are
made using the DSC-10510’s specifications. The DSC-10510
has a 7 VA drive capability for CT, CDX, or TR loads.
Simplest case first:
Passive Inductive Load and ±15 Volt DC
power stage supplies (as shown in Figure 2).
The power dis-
sipated in the power stage can be calculated by taking the inte-
gral of the instantaneous current multiplied by the voltage differ-
ence from the DC supply that supplies the current and instanta-
neous output voltage over one cycle of the reference. For an
inductive load this is a rather tedious calculation. Instead take the
difference between the power input from the DC supplies minus
the power delivered to the load. An actual synchro load is highly
inductive with a Q of 4-6; therefore assume that it is purely reac-
tive. The power out, then, is 0 Watts. As a worst case scenario,
also assume the load is the full 7 VA, the converter’s rated load.
The VA delivered to the load is independent of the angle but the
voltage across the synchro varies with the angle from a high of
11.8 Volts line-to-line (L-L) to a low of 10.2 V L-L. The maximum
• Simplified power dissipation management
3-WIRE SYNCHRO
R2=1 1/3Ω
2-WIRE REF
R1=2/3Ω
R1
R2
R2
R1
REF IN
D/S
ZSO=8.6Ω
REF
REF
REF
ACTIVE LOAD
TORQUE TRANSMITTER
TORQUE RECEIVER
NOTES:
R1 + R2
ZSS
FIGURE 5. EQUIVALENT 2-WIRE CIRCUIT
Data Device Corporation
www.ddc-web.com
FIGURE 6. TORQUE SYSTEM
DSC-10510
L-05/04-0
5