The SY89824L is a High Performance Bus Clock Driver
with 22 differential HSTL (High Speed Transceiver Logic)
output pairs. The part is designed for use in low voltage
(3.3V/1.8V) applications which require a large number of
outputs to drive precisely aligned, ultra low skew signals to
their destination. The input is multiplexed from either HSTL
or LVPECL (Low Voltage Positive Emitter Coupled Logic)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
The SY89824L features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)—performance
previously unachievable in a standard product having such
a high number of outputs. The SY89824L is available in a
single space saving package, enabling a lower overall cost
solution.
s
Available in a 64-Pin EPAD-TQFP
APPLICATIONS
s
High-performance PCs
s
Workstations
s
Parallel processor-based systems
s
Other high-performance computing
s
Communications
LOGIC SYMBOL
CLK_SEL
HSTL_CLK
/HSTL_CLK
0
22
22
Q0 - Q21
/Q0 - /Q21
LVPECL_CLK
1
/LVPECL_CLK
LEN
Q
OE
D
Precision Edge is a registered trademark of Micrel, Inc.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
Rev.: F
Amendment: /0
1
Issue Date: October 2005
Micrel, Inc.
Precision Edge
®
SY89824L
PACKAGE/ORDERING INFORMATION
Ordering Information
(1)
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Q
0
Q
0
V
CCO
V
CCO
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
Q
6
Q
6
V
CCO
NC
NC
V
CCI
HSTL_CLK
HSTL_CLK
CLK_SEL
LVPECL_CLK
LVPECL_CLK
GND
OE
NC
NC
Q
21
Q
21
V
CCO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
V
CCO
Q
7
Q
7
Q
8
Q
8
Q
9
Q
9
Q
10
Q
10
Q
11
Q
11
Q
12
Q
12
Q
13
Q
13
V
CCO
Part Number
SY89824LHC
SY89824LHCTR
(2)
SY89824LHH
(3)
SY89824LHHTR
(2, 3)
Package
Type
H64-1
H64-1
H64-1
H64-1
Operating
Range
Commercial
Commercial
Commercial
Commercial
Package
Marking
SY89824LHC
SY89824LHC
Lead
Finish
Sn-Pb
Sn-Pb
SY89824LHH with
Pb-Free
Pb-Free bar-line indicator NiPdAu
SY89824LHH with
Pb-Free
Pb-Free bar-line indicator NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
Q
20
Q
20
Q
19
Q
19
Q
18
Q
18
Q
17
Q
17
Q
16
Q
16
Q
15
Q
15
Q
14
Q
14
V
CCO
64-Pin EPAD-TQFP (H64-1)
PIN NAMES
Pin
HSTL_CLK, /HSTL_CLK
LVPECL_CLK, /LVPECL_CLK
CLK_SEL
OE
Q
0
-Q
21
, /Q
0
-/Q
21
GND
V
CCI
V
CCO
Function
Differential HSTL Inputs
Differential LVPECL Inputs
Input CLK Select (LVTTL)
Output Enable (LVTTL)
Differential HSTL Outputs
Ground
V
CC
Core
V
CC
Output
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
V
CCO
2
Micrel, Inc.
Precision Edge
®
SY89824L
TRUTH TABLE
OE
(1)
0
0
1
1
CLK_SEL
0
1
0
1
Q
0
-Q
21
LOW
LOW
HSTL_CLK
LVPECL_CLK
/Q
0
-/Q
21
HIGH
HIGH
/HSTL_CLK
/LVPECL_CLK
SIGNAL GROUPS
Level
HSTL
HSTL
LVPECL
LVCMOS/LVTTL
Direction
Input
Output
Input
Input
Signal
HSTL_CLK, /HSTL_CLK
Q
0
-Q
21
, /Q
0
-/Q
21
LVPECL_CLK, /LVPECL_CLK
CLK_SEL, OE
NOTE:
1. The OE (output enable) signal is synchronized with the low level of the
HSTL_CLK and LVPECL_CLK signal.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CCI
, V
CCO
V
IN
I
OUT
T
LEAD
T
store
θ
JA
Rating
V
CC
Pin Potential to Ground Pin
Input Voltage
DC Output Current (Output HIGH)
Lead Temperature (soldering, 20sec.)
Storage Temperature
Package Thermal Resistance (Junction-to-Ambient)
With Die attach soldered to GND:
–Still-Air (TQFP)
–200lfpm (TQFP)
–500lfpm (TQFP)
With Die attach NOT soldered to GND:
–Still-Air (TQFP)
–200lfpm (TQFP)
–500lfpm (TQFP)
Value
–0.5 to +4.0
–0.5 to V
CCI
–50
260
–65 to +150
23
18
15
44
36
30
4.3
Unit
V
V
mA
°C
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θ
JC
Package Thermal Resistance
(Junction-to-Case)
NOTE:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data book. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
Precision Edge
®
SY89824L
DC ELECTRICAL CHARACTERISTICS
Power Supply
T
A
= 0
°
C
Symbol
V
CCI
V
CCO
I
CCI
Parameter
V
CC
Core
V
CC
Output
I
CC
Core
Min.
3.0
1.6
—
Typ.
3.3
1.8
115
Max.
3.6
2.0
140
Min.
3.0
1.6
—
T
A
= +25
°
C
Typ.
3.3
1.8
115
Max.
3.6
2.0
140
Min.
3.0
1.6
—
T
A
= +85
°
C
Typ.
3.3
1.8
115
Max.
3.6
2.0
140
Unit
V
V
mA
HSTL
T
A
= 0
°
C
Symbol
V
OH
V
OL
V
IH
V
IL
V
X
I
IH
I
IL
Parameter
Output HIGH Voltage
(1)
Output LOW Voltage
(1)
Input HIGH Voltage
Input LOW Voltage
Input Crossover Voltage
Input HIGH Current
Input LOW Current
Min.
1.0
0.2
V
X
+0.1
–0.3
0.68
+20
—
Typ.
—
—
—
—
—
—
—
Max.
1.2
0.4
1.6
V
X
–0.1
0.9
–350
–500
Min.
1.0
0.2
V
X
+0.1
–0.3
0.68
+20
—
T
A
= +25
°
C
Typ.
—
—
—
—
—
—
—
Max.
1.2
0.4
1.6
V
X
–0.1
0.9
–350
–500
Min.
1.0
0.2
V
X
+0.1
–0.3
0.68
+20
—
T
A
= +85
°
C
Typ.
—
—
—
—
—
—
—
Max.
1.2
0.4
1.6
V
X
–0.1
0.9
–350
–500
Unit
V
V
V
V
V
µA
µA
NOTE:
1. Outputs loaded with 50Ω to ground.
LVPECL
T
A
= 0
°
C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Min.
Max.
T
A
= +25
°
C
Min.
Max.
T
A
= +85
°
C
Min.
Max.
Unit
V
V
µA
µA
V
CCI
– 1.165 V
CCI
– 0.880 V
CCI
– 1.165 V
CCI
– 0.880 V
CCI
– 1.165 V
CCI
– 0.880
V
CCI
– 1.810 V
CCI
– 1.475 V
CCI
– 1.810 V
CCI
– 1.475 V
CCI
– 1.810 V
CCI
– 1.475
—
0.5
+150
—
—
0.5
+150
—
—
0.5
+150
—
LVCMOS/LVTTL
T
A
= 0
°
C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Min.
2.0
—
+20
—
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Min.
2.0
—
+20
—
T
A
= +25
°
C
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Min.
2.0
—
+20
—
T
A
= +85
°
C
Typ.
—
—
—
—
Max.
—
0.8
–250
–600
Unit
V
V
µA
µA
M9999-110405
hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge
®
SY89824L
AC ELECTRICAL CHARACTERISTICS
(1)
T
A
= 0
°
C
Symbol
t
PD
t
SKEW
t
SKPP
V
PP
V
CMR
t
S
t
H
t
r
tf
Parameter
Propagation Delay
(2)
Within-Device Skew
(3)
Part-to-Part Skew
(4)
Minimum Input Swing
(5)
LVPECL_CLK
Common Mode Range
(6)
LVPECL_CLK
OE Set-Up Time
(7)
OE Hold Time
Output Rise/Fall Time
(20% – 80%)
Min.
—
—
—
600
–1.5
1.0
0.5
300
Typ.
1.0
—
—
—
—
—
—
—
Max.
—
50
200
—
–0.4
—
—
700
Min.
—
—
—
600
–1.5
1.0
0.5
300
T
A
= +25
°
C
Typ.
1.0
—
—
—
—
—
—
—
Max.
—
50
200
—
–0.4
—
—
700
—
—
—
600
–1.5
1.0
0.5
300
T
A
= +85
°
C
Min.
Typ.
1.0
—
—
—
—
—
—
—
Max.
—
50
200
—
–0.4
—
—
700
Unit
ns
ps
ps
mV
V
ns
ns
ps
NOTES:
1. Outputs loaded with 50Ω to ground. Airflow
≥
300lfpm.
2. Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential
output signals.
3. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same
voltage and temperature.
4. The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same
voltage and temperature.
5. The V
PP
(min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
6. V
CMR
is defined as the range within which the V
IH
level may vary, with the device still meeting the propagation delay specification. The numbers in
the table are referenced to V
CCI
. The V
IL
level must be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to V
PP
(min.).
The lower end of the CMR range varies 1:1 with V
CCI
. The V
CMR
(min) will be fixed at 3.3V – |V
CMR
(min)|.
7. OE set-up time is defined with respect to the rising edge of the clock. OE HIGH to LOW transition ensures outputs remain disabled during the next
clock cycle. OE LOW to HIGH transition enables normal operation of the next input clock.
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