MC68HC711KA4MFN2 datasheet, PDF

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MC68HC711KA4MFN2: DescriptionMicrocontroller, 8-Bit, OTPROM, 6800 CPU, 4MHz, CMOS, PQCC68, PLASTIC, LCC-68; CategoryThe embedded processor and controller Microcontrollers and processors; File Size336KB，68 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com

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MC68HC711KA4MFN2 Overview

Microcontroller, 8-Bit, OTPROM, 6800 CPU, 4MHz, CMOS, PQCC68, PLASTIC, LCC-68

MC68HC711KA4MFN2 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Motorola ( NXP )
package instruction	QCCJ, LDCC68,1.0SQ
Reach Compliance Code	unknown
Has ADC	YES
Address bus width	16
bit size	8
boundary scan	NO
CPU series	6800
maximum clock frequency	8 MHz
DAC channel	NO
DMA channel	NO
External data bus width	8
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-PQCC-J68
JESD-609 code	e0
length	24.2062 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	2
Number of I/O lines	51
Number of serial I/Os	2
Number of terminals	68
Number of timers	1
On-chip data RAM width	8
On-chip program ROM width	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC68,1.0SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
RAM (bytes)	768
RAM (number of words)	768
rom(word)	24576
ROM programmability	OTPROM
Maximum seat height	4.57 mm
speed	4 MHz
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	24.2062 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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MOTOROLA

SEMICONDUCTOR

TECHNICAL DATA

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by MC68HC11KA4TS/D

M68HC11 KA Series

Technical Summary

8-Bit Microcontroller

1 Introduction

The MC68HC11KA4 family of microcontrollers are enhanced derivatives of the MC68HC11F1 and, as

shown in the block diagram, include many additional features. The family includes the MC68HC11KA0,

MC68HC11KA1, MC68HC11KA3, MC68HC11KA4, MC68HC711KA4, MC68HC11KA2, and the

MC68HC711KA2. These MCUs, with a non-multiplexed expanded bus, are characterized by high

speed and low power consumption. The fully static design allows operation at frequencies from 4 MHz

to dc.

This technical summary contains information concerning standard, custom-ROM, and extended-volt-

age devices. Standard devices are those with disabled ROM (MC68HC11KA1), disabled EEPROM

(MC68HC11KA0), and EPROM replacing ROM (MC68HC711KA4). The MC68HC11KA2 and

MC68HC711KA2 contain 32 Kbytes of ROM/EPROM instead of 24 Kbytes. Custom-ROM devices have

a ROM array that is programmed at the factory to customer specifications. Extended-voltage devices

are guaranteed to operate over a much greater voltage range (3.0 Vdc to 5.5 Vdc) at lower frequencies

than the standard devices. Refer to the ordering information on the following pages.

In this summary, ROM/EPROM refers to ROM for ROM-based devices and refers to EPROM for

EPROM-based devices.

1.1 Features

• M68HC11 Central Processing Unit (CPU)

• Power Saving STOP and WAIT Modes

• 768 Bytes RAM in MC68HC11KA4, 1024 Bytes RAM in MC68HC11KA2 (Saved During Standby)

• 640 Bytes Electrically Erasable Programmable ROM (EEPROM)

• 24 Kbytes ROM/EPROM, 32 Kbytes ROM/EPROM in MC68HC11KA2

• PROG Mode Allows Use of Standard EPROM Programmer (27256 Footprint)

• Non-multiplexed Address and Data Buses

• Enhanced 16-Bit Timer with Four-Stage Programmable Prescaler

— Three Input Capture (IC) Channels

— Four Output Compare (OC) Channels

— One Additional Channel, Selectable as Fourth IC or Fifth OC

• 8-Bit Pulse Accumulator

• Four 8-Bit or Two 16-Bit Pulse-Width Modulation (PWM) Timer Channels

• Real-Time Interrupt Circuit

• Computer Operating Properly (COP) Watchdog

• Enhanced Asynchronous Nonreturn to Zero (NRZ) Serial Communications Interface (SCI)

• Enhanced Synchronous Serial Peripheral Interface (SPI)

• Eight-Channel 8-Bit Analog-to-Digital (A/D) Converter (Four Channels on 64-Pin Version)

• Seven Bidirectional Input/Output (I/O) Ports (43 Pins)

• One Fixed Input-Only Port (8 Pins, 4 Pins on 64-Pin Version)

• Available in 68-Pin Plastic Leaded Chip Carrier (Custom ROM/OTPROM), 68-Pin Windowed Ce-

ramic Leaded Chip Carrier (EPROM), or 64-Pin Quad Flat Pack (Custom ROM/OTPROM)

This document contains information on a new product. Speciﬁcations and information herein are subject to change without notice.

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