8422004AGIT datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> 8422004AGIT

8422004AGIT: DescriptionClock Generator, 226.66MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24; CategoryThe embedded processor and controller Microcontrollers and processors; File Size412KB，14 Pages; ManufacturerIDT (Integrated Device Technology)

Download Datasheet Parametric Compare View All

8422004AGIT Overview

Clock Generator, 226.66MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24

8422004AGIT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24
Contacts	24
Reach Compliance Code	not_compliant
ECCN code	EAR99
Other features	ALSO OPERATES AT 3.3V SUPPLY
JESD-30 code	R-PDSO-G24
JESD-609 code	e0
length	7.8 mm
Humidity sensitivity level	1
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	226.66 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP24,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	240
power supply	2.5/3.3 V
Master clock/crystal nominal frequency	28.33 MHz
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage	2.625 V
Minimum supply voltage	2.375 V
Nominal supply voltage	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	4.4 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER

Preview

Download Datasheet

View All

PRELIMINARY

DATA SHEET

Integrated

FEMTOCLOCKS™ LVCMOS/CRYSTAL-TO-LVHSTL

™LVCMOS/C

ICS8422004I

Circuit

EMTO

LOCKS

RYSTAL

Systems, Inc.

FREQUENCY SYNTHESIZER

LVHSTL F

REQUENCY

YNTHESIZER

ICS8422004I

ENERAL

ESCRIPTION

The ICS8422004I is a 4 output LVHSTL Synthesizer

optimized to generate Fibre Channel reference

HiPerClockS™

clock frequencies and is a member of the

HiPerClocks

family of high performance clock

solutions from ICS. Using a 26.5625MHz 18pF

parallel resonant crystal, the following frequencies can be

generated based on the 2 frequency select pins (F_SEL[1:0]):

212.5MHz, 187.5MHz, 159.375MHz, 156.25, 106.25MHz and

53.125MHz. The ICS8422004I uses ICS’ 3

generation low

phase noise VCO technology and can achieve 1ps or lower

typical rms phase jitter, easily meeting Fibre Channel jitter

requirements. The ICS8422004I is packaged in a small

24-pin TSSOP package.

EATURES

• Four LVHSTL outputs (VOHmax = 1.2V)

• Selectable crystal oscillator interface

or LVCMOS/LVTTL single-ended input

• Supports the following output frequencies: 212.5MHz,

187.5MHz, 159.375MHz, 156.25, 106.25MHz, 53.125MHz

• VCO range: 560MHz - 680MHz

• RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal

(637kHz - 10MHz): 0.59ps (typical)

• Power supply modes:

Core/Output

3.3V/1.8V

2.5V/1.8V

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

REQUENCY

ELECT

UNCTION

ABLE

Input

Frequency

(MHz)

26.5625

26.04166

23.4375

Inputs

M Divider N Divider

Value

M/N

Divider Value

Output

Frequency

(MHz)

212.5

159.375

106.25

53.125

156.25

187.5

SSIGNMENT

nQ1

DDO

nQ0

nPLL_SEL

DDA

F_SEL0

F_SEL1

nQ2

DDO

nQ3

GND

nXTAL_SEL

TEST_CLK

GND

XTAL_IN

XTAL_OUT

F_SEL1 F_SEL0

ICS8422004I

LOCK

IAGRAM

F_SEL[1:0]

Pulldown

nPLL_SEL

Pulldown

24-Lead TSSOP

4.40mm x 7.8mm x 0.92mm

package body

G Package

Top View

F_SEL[1:0]

0 0 ÷3

0 1 ÷4

1 0 ÷6

1 1 ÷12

TEST_CLK

Pulldown

26.5625MHz

nQ0

nQ1

XTAL_IN

OSC

XTAL_OUT

nXTAL_SEL

Pulldown

Phase

Detector

VCO

nQ2

M = 24 (fixed)

Pulldown

nQ3

The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial

product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.

8422004AGI

www.icst.com/products/hiperclocks.html

REV. B NOVEMBER 14, 2005

IDT™ / ICS™

FEMTOCLOCKS™ LVCMOS/CRYSTAL-TO-LVHSTL FREQUENCY SYNTHESIZER

ICS8422004I

8422004AGIT Related Products

	8422004AGIT	8422004AGI	8422004AGILF	8422004AGILFT
Description	Clock Generator, 226.66MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24	Clock Generator, 226.66MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24	Clock Generator, 226.66MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-24	Clock Generator, 226.66MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, ROHS COMPLIANT, MO-153, TSSOP-24
Is it Rohs certified?	incompatible	incompatible	conform to	conform to
Parts packaging code	TSSOP	TSSOP	TSSOP	TSSOP
package instruction	4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24	4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24	TSSOP, TSSOP24,.25	TSSOP, TSSOP24,.25
Contacts	24	24	24	24
Reach Compliance Code	not_compliant	not_compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
Other features	ALSO OPERATES AT 3.3V SUPPLY	ALSO OPERATES AT 3.3V SUPPLY	ALSO OPERATES AT 3.3V SUPPLY	ALSO OPERATES AT 3.3V SUPPLY
JESD-30 code	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24
JESD-609 code	e0	e0	e3	e3
length	7.8 mm	7.8 mm	7.8 mm	7.8 mm
Number of terminals	24	24	24	24
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Maximum output clock frequency	226.66 MHz	226.66 MHz	226.66 MHz	226.66 MHz
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	TSSOP	TSSOP
Encapsulate equivalent code	TSSOP24,.25	TSSOP24,.25	TSSOP24,.25	TSSOP24,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	240	240	260	260
power supply	2.5/3.3 V	2.5/3.3 V	2.5/3.3 V	2.5/3.3 V
Master clock/crystal nominal frequency	28.33 MHz	28.33 MHz	28.33 MHz	28.33 MHz
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm
Maximum supply voltage	2.625 V	2.625 V	2.625 V	2.625 V
Minimum supply voltage	2.375 V	2.375 V	2.375 V	2.375 V
Nominal supply voltage	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Matte Tin (Sn)	Matte Tin (Sn)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	30	30
width	4.4 mm	4.4 mm	4.4 mm	4.4 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER	CLOCK GENERATOR, OTHER
Maker	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)

Recommended Resources

High quality melody circuit

Low voltage contactor instantaneous voltage loss and undervoltage delay circuit

Novel walkie-talkie circuit diagram

Analog target shooting game console circuit

6-channel input mixer

820e computer motherboard circuit diagram_35

About PIN-to-PIN compatibility between SI24R1 and NRF24L01P: [size=4] Si24r1 is a 2.4G RF chip with its own intellectual property rights designed by Nanjing Zhongkewei for low-power wireless communication applications. It is currently mainly used in low-power s...; Jacktang Wireless Connectivity

Huawei_Large-Scale Logic Design Guide.rar: Huawei_Large-Scale Logic Design Guide.rar...; 雷北城 EE_FPGA Learning Park

Announcement: Participants in the last round of the lottery will be given 11.11 yuan to purchase a multimeter, soldering station, and development board: 11.11 yuan to buy multimeters and development boards, a Double 11 feast for new users of element11. The second round of lucky draw will officially start at 10:00 on November 25. The prize pool of this...; nmg Integrated technical exchanges

MSP430 clock frequency configuration process: 1 XT1 clock configuration initialization/***************************************************************************** Function name: XT1_Config(STATUS status)* Function description: Set whether to en...; 火辣西米秀 Microcontroller MCU

[Mill Edge AI Computing Box FZ5 Review] Pynq Framework - Helloworld!: This time, we will conduct the first routine of the PYNQ framework. This routine will use two methods to achieve image scaling. The most classic algorithm for image scaling is bilinear interpolation, ...; zzx1997 Embedded System

pybNano development board added to uf2-stm32f: Added support for the pybNano v2 development board in the UF2 bootloader of the STM32F4.https://github.com/mmoskal/uf2-stm32f/t ... /pybnanov2If you don't want to compile it yourself, you can use the ...; dcexpert MicroPython Open Source section

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components