1 pC Charge Injection, 100 pA Leakage,
CMOS, ±5 V/+5 V/+3 V, Quad SPST Switches
ADG611/ADG612/ADG613
FEATURES
1 pC charge injection
±2.7 V to ±5.5 V dual-supply operation
+2.7 V to +5.5 V single-supply operation
Automotive temperature range: −40°C to +125°C
100 pA maximum at 25°C leakage currents
85 Ω on resistance
Rail-to-rail switching operation
Fast switching times
16-lead TSSOP and SOIC packages
Typical power consumption: <0.1 μW
TTL-/CMOS-compatible inputs
IN1
D1
S2
IN2
D2
S3
IN3
D3
S4
IN4
D4
NOTES
1. SWITCHES SHOWN FOR A LOGIC 1 INPUT.
IN4
D4
IN3
D3
S4
IN4
D4
02753-001
FUNCTIONAL BLOCK DIAGRAM
ADG611
S1
IN1
D1
S2
IN2
D2
S3
IN3
D3
S4
IN2
D2
S3
ADG612
S1
IN1
ADG613
S1
D1
S2
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Communications systems
Sample-and-hold systems
Audio signal routing
Relay replacement
Avionics
Figure 1.
GENERAL DESCRIPTION
The ADG611/ADG612/ADG613 are monolithic CMOS devices
containing four independently selectable switches. These switches
offer ultralow charge injection of 1 pC over the full input signal
range and typical leakage currents of 10 pA at 25°C.
The devices are fully specified for ±5 V, +5 V, and +3 V supplies.
Each contains four independent single-pole, single-throw (SPST)
switches. The ADG611 and ADG612 differ only in that the digital
control logic is inverted. The ADG611 switches are turned on
with a logic low on the appropriate control input, whereas a
logic high is required to turn on the switches of the ADG612.
The ADG613 contains two switches with digital control logic
similar to that of the ADG611 and two switches in which the
logic is inverted.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG613 exhibits break-before-make switching action. The
ADG611/ADG612/ADG613 are available in a small, 16-lead
TSSOP package, and the ADG611 is also available in a 16-lead
SOIC package.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Ultralow charge injection (1 pC typically).
Dual ±2.7 V to ±5.5 V or single +2.7 V to +5.5 V operation.
Automotive temperature range: −40°C to +125°C.
Small, 16-lead TSSOP and SOIC packages.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
ADG611/ADG612/ADG613
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Dual-Supply Operation ............................................................... 3
Single-Supply Operation ............................................................. 4
Absolute Maximum Ratings ............................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions..............................7
Typical Performance Characteristics ..............................................8
Terminology .................................................................................... 10
Test Circuits ..................................................................................... 11
Applications Information .............................................................. 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
REVISION HISTORY
11/09—Rev. 0 to Rev. A
Changes to Analog Signal Range Parameter
and to On Resistance, R
ON
Parameter, Table 1 .......................... 3
Change to Digital Input Capacitance, C
IN
Parameter, Table 2 .... 4
Changes to Table 4 and to Absolute Maximum Ratings Section...... 6
Added Table 5; Renumbered Sequentially .................................... 7
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
1/02—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADG611/ADG612/ADG613
SPECIFICATIONS
DUAL-SUPPLY OPERATION
V
DD
= +5 V ± 10%, V
SS
= −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
On-Resistance Match
Between Channels, ΔR
ON
On-Resistance Flatness, R
FLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, I
S(OFF)
Drain Off Leakage, I
D(OFF)
Channel On Leakage, I
D(ON)
, I
S(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
C
S(OFF)
C
D(OFF)
C
D(ON)
, C
S(ON)
POWER REQUIREMENTS
I
DD
I
SS
+25°C
−40°C to +85°C
−40°C to +125°C
1
V
SS
to V
DD
85
115
2
4
25
40
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
140
160
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
Test Conditions/Comments
V
S
= ±3 V, I
S
= −1 mA; see Figure 14
V
S
= ±3 V, I
S
= −1 mA; see Figure 14
V
S
= ±3 V, I
S
= −1 mA
V
S
= ±3 V, I
S
= −1 mA
V
S
= ±3 V, I
S
= −1 mA
V
S
= ±3 V, I
S
= −1 mA
V
DD
= +5.5 V, V
SS
= −5.5 V
V
D
= ±4.5 V, VS = +4.5 V; see Figure 15
V
D
= ±4.5 V, VS = +4.5 V; see Figure 15
V
D
= ±4.5 V, V
S
= + 4.5 V; see Figure 15
V
D
= ±4.5 V, V
S
= + 4.5 V; see Figure 15
V
D
= V
S
= ±4.5 V; see Figure 16
V
D
= V
S
= ±4.5 V; see Figure 16
5.5
55
6.5
60
±0.25
±0.25
± 0.25
±2
±2
±6
2.4
0.8
0.005
±0.1
2
45
65
25
40
15
−0.5
−65
−90
680
5
5
5
0.001
1.0
0.001
1.0
V
IN
= V
INL
or V
INH
V
IN
= V
INL
or V
INH
75
45
90
50
10
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S1
= V
S2
= 3.0 V; see Figure 18
R
L
= 300 Ω, C
L
= 35 pF, V
S1
= V
S2
= 3.0 V; see Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz; see Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz; see Figure 21
R
L
= 50 Ω, C
L
= 5 pF; see Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= +5.5 V, V
SS
= −5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
1
2
The temperature range for the Y version is −40°C to +125°C.
Guaranteed by design; not subject to production test.
Rev. A | Page 3 of 16
ADG611/ADG612/ADG613
SINGLE-SUPPLY OPERATION
V
DD
= 5 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
On-Resistance Match
Between Channels, ΔR
ON
LEAKAGE CURRENTS
Source Off Leakage, I
S(OFF)
Drain Off Leakage, I
D(OFF)
Channel On Leakage, I
D(ON)
, I
S(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
C
S(OFF)
C
D(OFF)
C
D(ON)
, C
S(ON)
POWER REQUIREMENTS
I
DD
+25°C
−40°C to +85°C
−40°C to +125°C
1
0 to V
DD
210
290
3
10
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
350
380
Unit
V
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
Test Conditions/Comments
V
S
= 3.5 V, I
S
= −1 mA; see Figure 14
V
S
= 3.5 V, I
S
= −1 mA; see Figure 14
V
S
= 3.5 V, I
S
= −1 mA
V
S
= 3.5 V, I
S
= −1 mA
V
DD
= 5.5 V
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V; see Figure 15
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V; see Figure 15
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V; see Figure 15
V
S
= 1 V/4.5 V, V
D
= 4.5 V/1 V; see Figure 15
V
S
= V
D
= 1 V or 4.5 V; see Figure 16
V
S
= V
D
= 1 V or 4.5 V; see Figure 16
12
13
±0.25
±0.25
±0.25
±2
±2
±6
2.4
0.8
0.005
±0.1
2
70
100
25
40
25
1
−62
−90
680
5
5
5
0.001
1.0
V
IN
= V
INL
or V
INH
V
IN
= V
INL
or V
INH
130
45
150
50
10
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 3.0 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S1
= V
S2
= 3.0 V; see Figure 18
R
L
= 300 Ω, C
L
= 35 pF, V
S1
= V
S2
= 3.0 V; see Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz; see Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz; see Figure 21
R
L
= 50 Ω, C
L
= 5 pF; see Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
1
2
The temperature range for the Y version is −40°C to +125°C.
Guaranteed by design; not subject to production test.
Rev. A | Page 4 of 16
ADG611/ADG612/ADG613
V
DD
= 3 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, R
ON
LEAKAGE CURRENTS
Source Off Leakage, I
S(OFF)
Drain Off Leakage, I
D(OFF)
Channel On Leakage, I
D(ON)
, I
S(ON)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
2
t
ON
t
OFF
Break-Before-Make Time Delay, t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
C
S(OFF)
C
D(OFF)
C
D(ON)
, C
S(ON)
POWER REQUIREMENTS
I
DD
+25°C
−40°C to +85°C
−40°C to +125°C
1
0 to V
DD
460
Unit
V
Ω typ
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
Test Conditions/Comments
380
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
420
±0.25
±0.25
±0.25
±2
±2
±6
2.0
0.8
V
S
= 1.5 V, I
S
= −1 mA; see Figure 14
V
DD
= 3.3 V
V
S
= 1 V/3 V, V
D
= 3 V/1 V; see Figure 15
V
S
= 1 V/3 V, V
D
= 3 V/1 V; see Figure 15
V
S
= 1 V/3 V, V
D
= 3 V/1 V; see Figure 15
V
S
= 1 V/3 V, V
D
= 3 V/1 V; see Figure 15
V
S
= V
D
= 1 V or 3 V; see Figure 16
V
S
= V
D
= 1 V or 3 V; see Figure 16
0.005
±0.1
2
130
185
40
55
50
1.5
−62
−90
680
5
5
5
0.001
1.0
V
IN
= V
INL
or V
INH
V
IN
= V
INL
or V
INH
230
60
260
65
10
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 2 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 2 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 2 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S
= 2 V; see Figure 17
R
L
= 300 Ω, C
L
= 35 pF, V
S1
= V
S2
= 2 V; see Figure 18
R
L
= 300 Ω, C
L
= 35 pF, V
S1
= V
S2
= 2 V; see Figure 18
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 19
R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz; see Figure 20
R
L
= 50 Ω, C
L
= 5 pF, f = 10 MHz; see Figure 21
R
L
= 50 Ω, C
L
= 5 pF; see Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
V
DD
= 3.3 V
Digital inputs = 0 V or 3.3 V
Digital inputs = 0 V or 3.3 V
1
2
The temperature range for the Y version is −40°C to +125°C.
Guaranteed by design; not subject to production test.
Rev. A | Page 5 of 16
京公网安备 11010802033920号
EEWORLD
