Power Field-Effect Transistor, 6.5A I(D), 100V, 0.35ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, LCC-18
| Parameter Name | Attribute value |
| Is it lead-free? | Contains lead |
| Maker | International Rectifier （ Infineon ） |
| Parts packaging code | LCC |
| package instruction | CHIP CARRIER, R-CQCC-N15 |
| Contacts | 18 |
| Reach Compliance Code | unknown |
| ECCN code | EAR99 |
| Avalanche Energy Efficiency Rating (Eas) | 165 mJ |
| Shell connection | SOURCE |
| Configuration | SINGLE WITH BUILT-IN DIODE |
| Minimum drain-source breakdown voltage | 100 V |
| Maximum drain current (ID) | 6.5 A |
| Maximum drain-source on-resistance | 0.35 Ω |
| FET technology | METAL-OXIDE SEMICONDUCTOR |
| JESD-30 code | R-CQCC-N15 |
| Number of components | 1 |
| Number of terminals | 15 |
| Operating mode | ENHANCEMENT MODE |
| Maximum operating temperature | 150 °C |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| Package shape | RECTANGULAR |
| Package form | CHIP CARRIER |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| Polarity/channel type | P-CHANNEL |
| Maximum pulsed drain current (IDM) | 26 A |
| Certification status | Not Qualified |
| Guideline | MIL-19500/630 |
| surface mount | YES |
| Terminal form | NO LEAD |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| transistor applications | SWITCHING |
| Transistor component materials | SILICON |
| JANSF2N7389U | JANSR2N7389U | |
|---|---|---|
| Description | Power Field-Effect Transistor, 6.5A I(D), 100V, 0.35ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, LCC-18 | Power Field-Effect Transistor, 6.5A I(D), 100V, 0.35ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, LCC-18 |
| Is it lead-free? | Contains lead | Contains lead |
| Maker | International Rectifier （ Infineon ） | International Rectifier （ Infineon ） |
| Parts packaging code | LCC | LCC |
| package instruction | CHIP CARRIER, R-CQCC-N15 | CHIP CARRIER, R-CQCC-N15 |
| Contacts | 18 | 18 |
| Reach Compliance Code | unknown | compliant |
| ECCN code | EAR99 | EAR99 |
| Avalanche Energy Efficiency Rating (Eas) | 165 mJ | 165 mJ |
| Shell connection | SOURCE | SOURCE |
| Configuration | SINGLE WITH BUILT-IN DIODE | SINGLE WITH BUILT-IN DIODE |
| Minimum drain-source breakdown voltage | 100 V | 100 V |
| Maximum drain current (ID) | 6.5 A | 6.5 A |
| Maximum drain-source on-resistance | 0.35 Ω | 0.35 Ω |
| FET technology | METAL-OXIDE SEMICONDUCTOR | METAL-OXIDE SEMICONDUCTOR |
| JESD-30 code | R-CQCC-N15 | R-CQCC-N15 |
| Number of components | 1 | 1 |
| Number of terminals | 15 | 15 |
| Operating mode | ENHANCEMENT MODE | ENHANCEMENT MODE |
| Package body material | CERAMIC, METAL-SEALED COFIRED | CERAMIC, METAL-SEALED COFIRED |
| Package shape | RECTANGULAR | RECTANGULAR |
| Package form | CHIP CARRIER | CHIP CARRIER |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED | NOT SPECIFIED |
| Polarity/channel type | P-CHANNEL | P-CHANNEL |
| Maximum pulsed drain current (IDM) | 26 A | 26 A |
| Certification status | Not Qualified | Not Qualified |
| Guideline | MIL-19500/630 | MIL-19500/630 |
| surface mount | YES | YES |
| Terminal form | NO LEAD | NO LEAD |
| Terminal location | QUAD | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED | NOT SPECIFIED |
| transistor applications | SWITCHING | SWITCHING |
| Transistor component materials | SILICON | SILICON |
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