SSM60T03GP,S
N-channel Enhancement-mode Power MOSFET
Low gate-charge
Simple drive requirement
Fast switching
Pb-free, RoHS compliant.
D
BV
DSS
R
DS(ON)
I
D
30V
12mΩ
45A
G
S
DESCRIPTION
The SSM60T03GS is in a TO-263 package, which is widely used for
commercial and industrial surface-mount applications. This device is
suitable for low-voltage applications such as DC/DC converters.
The through-hole version, the SSM60T03GP in TO-220, is available for
vertical-mounting, where a small footprint is required on the board, and/or
an external heatsink is to be attached.
These devices are manufactured with an advanced process, permitting
operation up to a maximum junction temperature of 175°C.
G
D S
TO-263 (S)
G
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
GS
I
D
@ T
C
=25°C
I
D
@ T
C
=100°C
I
DM
P
D
@ T
C
=25°C
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current
1
D
TO-220(P)
S
Units
V
V
A
A
A
W
W/°C
Rating
30
±20
45
32
120
44
0.352
Total Power Dissipation
Linear Derating Factor
T
STG
T
J
Storage Temperature Range
Operating Junction Temperature Range
-55 to 175
-55 to 175
°C
°C
THERMAL DATA
Symbol
R
Θ
JC
R
Θ
JA
Parameter
Maximum Thermal Resistance Junction-case
Maximum Thermal Resistance Junction-ambient
Value
3.4
62
Units
°C/W
°C/W
9/16/2005 Rev.3.1
www.SiliconStandard.com
1 of 5
SSM60T03GP,S
ELECTRICAL CHARACTERISTICS
(at T
j
=25°C, unless otherwise specified)
Symbol
BV
DSS
Parameter
Drain-Source Breakdown Voltage
Test Conditions
V
GS
=0V, I
D
=250uA
Min.
30
-
-
-
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
-
0.03
-
-
-
25
-
-
-
11.6
3.9
7
8.8
57.5
18.5
6.4
200
135
Max. Units
-
-
12
25
3
-
1
250
±100
19
-
-
-
-
-
-
-
-
V
V/°C
mΩ
mΩ
V
S
uA
uA
nA
nC
nC
nC
ns
ns
ns
ns
pF
pF
pF
∆
BV
DSS
/
∆
Tj
R
DS(ON)
Breakdown Voltage Temperature Coefficient
Reference to 25°C, I
D
=1mA
Static Drain-Source On-Resistance
2
V
GS
=10V, I
D
=20A
V
GS
=4.5V, I
D
=15A
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Gate Threshold Voltage
Forward Transconductance
2
V
DS
=V
GS
, I
D
=250uA
V
DS
=10V, I
D
=10A
V
DS
=30V, V
GS
=0V
V
DS
=24V ,V
GS
=0V
V
GS
= ±20V
I
D
=20A
V
DS
=24V
V
GS
=4.5V
V
DS
=15V
I
D
=20A
R
G
=3.3Ω , V
GS
=10V
R
D
=0.75Ω
V
GS
=0V
V
DS
=25V
f=1.0MHz
Drain-Source Leakage Current (T
j
=25
o
C)
Drain-Source Leakage Current (T
j
=175
o
C)
Gate-Source Leakage
Total Gate Charge
2
Gate-Source Charge
Gate-Drain ("Miller") Charge
Turn-on Delay Time
2
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
1135 1816
Source-Drain Diode
Symbol
V
SD
t
rr
Q
rr
Parameter
Forward On Voltage
2
Reverse Recovery Time
2
Test Conditions
I
S
=45A, V
GS
=0V
I
S
=20A, V
GS
=0V,
dI/dt=100A/µs
Min.
-
-
-
Typ.
-
23.3
16
Max. Units
1.3
-
-
V
ns
nC
Reverse Recovery Charge
Notes:
1.Pulse width limited by safe operating area.
2.Pulse width <300us, duty cycle <2%.
9/16/2005 Rev.3.1
www.SiliconStandard.com
2 of 5
SSM60T03GP,S
125
90
100
T
C
=25 C
o
10V
8.0V
I
D
, Drain Current (A)
T
C
=175 C
o
10V
8.0V
6.0V
I
D
, Drain Current (A)
6.0V
75
60
5.0V
30
5.0V
50
25
V
G
=4.0V
V
G
=4.0V
0
0
0
1
2
3
4
0
1
2
3
4
5
V
DS
, Drain-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
80
2
I
D
=15A
T
C
=25 ° C
60
1.6
I
D
=20A
V
G
=10V
Normalized R
DS(ON)
R
DS(ON)
(m
Ω
)
40
1.2
20
0.8
0
2
4
6
8
10
0.4
-50
25
100
175
V
GS
, Gate-to-Source Voltage (V)
T
j
, Junction Temperature (
o
C)
Fig 3. On-Resistance vs. Gate Voltage
Fig 4. Normalized On-Resistance
vs. Junction Temperature
3
100
10
2
1
V
GS(th)
(V)
1
0
1.5
-50
T
j
=175
o
C
I
S
(A)
T
j
=25
o
C
0.1
0
0.5
1
25
100
175
V
SD
, Source-to-Drain Voltage (V)
T
j
, Junction Temperature ( C )
o
Fig 5. Forward Characteristic of
Reverse Diode
9/16/2005 Rev.3.1
Fig 6. Gate Threshold Voltage vs.
Junction Temperature
www.SiliconStandard.com
3 of 5
SSM60T03GP,S
f=1.0MHz
12
10000
I
D
=20A
V
GS
, Gate to Source Voltage (V)
9
C (pF)
V
DS
=16V
V
DS
=20V
V
DS
=24V
C
iss
6
1000
3
C
oss
C
rss
0
0
6
12
18
24
100
1
8
15
22
29
Q
G
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1000
1
Normalized Thermal Response (R
thjc
)
Duty factor = 0.5
100
0.2
0.1
I
D
(A)
100us
10
0.1
0.05
P
DM
0.02
t
T
Duty Factor = t/T
Peak T
j
= P
DM
x R
thjc
+ T
C
1ms
10ms
100ms
DC
0.01
Single Pulse
1
0.1
1
10
100
0.01
0.00001
0.0001
0.001
0.01
0.1
1
V
DS
, Drain-to-Source Voltage (V)
t , Pulse Width (s)
Fig 9. Maximum Safe Operating Area
Fig 10. Effective Transient Thermal Impedance
V
DS
90%
V
G
Q
G
4.5V
Q
GS
Q
GD
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Charge
Q
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
9/16/2005 Rev.3.1
www.SiliconStandard.com
4 of 5
SSM60T03GP,S
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
9/16/2005 Rev.3.1
www.SiliconStandard.com
5 of 5