OT PLD, 15ns, PQCC28
Parameter Name | Attribute value |
Maker | NXP |
package instruction | QCCJ, |
Reach Compliance Code | unknown |
Other features | 10 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
maximum clock frequency | 50 MHz |
JESD-30 code | S-PQCC-J28 |
length | 11.5062 mm |
Dedicated input times | 11 |
Number of I/O lines | 10 |
Number of terminals | 28 |
Maximum operating temperature | 75 °C |
Minimum operating temperature | |
organize | 11 DEDICATED INPUTS, 10 I/O |
Output function | MACROCELL |
Package body material | PLASTIC/EPOXY |
encapsulated code | QCCJ |
Package shape | SQUARE |
Package form | CHIP CARRIER |
Programmable logic type | OT PLD |
propagation delay | 15 ns |
Certification status | Not Qualified |
Maximum seat height | 4.57 mm |
Maximum supply voltage | 3.6 V |
Minimum supply voltage | 3 V |
Nominal supply voltage | 3.3 V |
surface mount | YES |
technology | BICMOS |
Temperature level | COMMERCIAL EXTENDED |
Terminal form | J BEND |
Terminal pitch | 1.27 mm |
Terminal location | QUAD |
width | 11.5062 mm |