TS39105
1A Ultra Low LDO with Enable
TO-252-4L
(PPAK)
TO-252-5L
Pin Definition:
1. Input
2. Enable
3. Output (tab)
4. N/C
5. Ground
General Description
The TS39105 are 1A ultra low dropout linear voltage regulators that provide low voltage, high current output from an
extremely small package. These regulators offers extremely low dropout (typically 400mV at 1A) and very low
ground current (typically 12mA at 1A). The TS39105 are fully protected against over current faults, reversed input
polarity, reversed lead insertion, over temperature operation, positive and negative transient voltage spikes, logic
level enable control and error flag which signals whenever the output falls out of regulation.
On the TS39105, the enable pin may be tied to Vin if it is not required for enable control.
Features
●
●
●
●
●
●
Dropout voltage typically 0.4V @Io=1.0A
Output Current up to 1A
Low Ground Current
Extremely Fast Transient Response
Reversed Leakage & Reverse Battery Protection
Current Limit & Thermal Shutdown Protection
Ordering Information
Part No.
Package
Packing
TS39105CP4xx RO TO-252-4L 2.5Kpcs / 13” Reel
TS39105CP5xx RO TO-252-5L 2.5Kpcs / 13” Reel
Note: Where
xx
denotes voltage option, available are
18=1.8V, 25=2.5V, 33=3.3V, 50=5.0V
Application
●
●
●
●
●
●
●
●
●
ULDO Linear Regulator for PC add-in Cards
TM
PowerPC Power Supplies
Battery Powered Equipment
Consumer and Personal Electronics
High Efficiency Linear Power Supplies
SMPS Post Regulator and DC to DC Modules
High-efficiency Post Regulator for Switching Supply
Portable Application
Low-Voltage microcontrollers and Digital Logic
Typical Application Circuit
Absolute Maximum Rating
(Note 1)
Parameter
Supply Voltage
Enable Voltage
Operation Input Voltage
Operation Enable Voltage
Power Dissipation (Note 4)
Operating Junction Temperature Range
Storage Temperature Range
Lead Soldering Temperature (260 C)
ESD
1/7
o
Symbol
V
IN
V
EN
V
IN
(operate)
V
EN
(operate)
P
D
T
J
T
STG
Value
-20V ~ +20
+20
+2.25 ~ +16
+2.25 ~ +16
Internally Limited
-40 ~ +125
-65 ~ +150
5
(Note 3)
Units
V
V
V
V
W
o
o
C
C
S
Version: A08
TS39105
1A Ultra Low LDO with Enable
Electrical Characteristics
Parameter
Conditions
10mA
≤
I
L
≤
1.0A,
Vo+1V
≤
V
IN
≤
8V
10mA
≤
I
L
≤
1.0A,
2.5V
≤
V
IN
≤
16V
I
L
=10mA, Vo+1V
≤
V
IN
≤
16V
V
IN
=Vout+1V, 8mA≤I
L
≤300mA
V
IN
=Vout+1V, 10mA≤I
L
≤1A
I
L
=100mA
I
L
=500mA
I
L
=1.0A
I
L
=100mA
I
L
=500mA
I
L
=1.0A
V
IN
= V
OUT
+ 1V, V
IN
=2.5V for fixed reference output voltage, Venable= 2.25V, Ta = 25 C, unless otherwise specified.
o
Min
0.980|Vo|
Typ
Max
1.020|Vo|
Unit
V
V
%
%
ppm/ C
mV
o
Output Voltage
V
OUT
0.970|Vo|
--
--
--
--
--
--
--
--
--
--
--
--
2.25
--
--
0.05
0.05
0.2
40
100
275
400
0.7
4.0
12.0
1.8
--
--
--
--
1.030|Vo|
0.5
0.1
1.0
100
250
350
630
2
6
20
--
0.8
--
75
4
Line Regulation
Load Regulation
Output Voltage Temp. Coefficient
Dropout Voltage (Note 5)
ΔV
OUT
= -1%
Quiescent Current (Note 6)
Current Limited
V
IN
= V
OUT
+1V
mA
A
V
OUT
=0, V
IN
= V
OUT
+1V
Low (OFF)
High (ON)
V
EN
=2.25V
V
EN
=0.8V
Enable Input
Input Logic Voltage
Enable Pin Input Current
V
uA
Thermal Performance
Condition
Thermal Resistance Junction to Case
Package type
TO-252-4L
TO-252-5L
Typ
10
10
Unit
o
C/W
Note 1: Absolute Maximum Rating is limits beyond which damage to the device may occur. For guaranteed
specifications and test conditions see the Electrical Characteristics.
Note 2: The device is not guaranteed to operate outside its operating rating.
Note 3: Devices are ESD sensitive. Handling precautions recommended.
Note 4: The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
, the junction
to ambient thermal resistance,
Ө
JA
, and the ambient temperature, Ta. Exceeding the maximum allowable
power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. The
effective value of
Ө
JA
can be reduced by using a heat sink, Pd
(max)
= (T
J(max)
– Ta) /
Ө
JA
.
Note 5: Dropout voltage is defined as the input to output differential at which the output voltage drops -1% below its
nominal value measured at 1V differential.
Note 6: Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the
ground pin current and output load current, I
GND
= I
IN
- I
OUT
for fix output voltage, , I
GND
= I
IN
- I
OUT
+10mA for fix
reference output voltage in full load regulation.
o
Note 8: Output voltage temperature coefficient is
ΔV
OUT
(worse cast) / (T
J(max)
– T
J(MIN)
) where is T
J(max)
+125 C and
o
T
J(MIN)
is 0 C.
2/7
Version: A08
TS39105
1A Ultra Low LDO with Enable
Functional Diagram
Application Information
The TS39105 are high performance with low dropout voltage regulator suitable for moderate to high current and
voltage regulator application. Its 630mV dropout voltage at full load and over temperature makes it especially valuable
in battery power systems and as high efficiency noise filters in post regulator applications. Unlike normal NPN
transistor design, where the base to emitter voltage drop and collector to emitter saturation voltage limit the minimum
dropout voltage, dropout performance of the PNP output of these devices is limited only by low V
CE
saturation voltage.
The TS39105 is fully protected from damage due to fault conditions. Linear current limiting is provided. Output current
during overload conditions is constant. Thermal shutdown the device when the die temperature exceeds the maximum
safe operating temperature. Transient protection allows device survival even when the input voltage spikes above and
below nominal. The output structure of these regulators allows voltages in excess of the desired output voltage to be
applied without reverse current flow.
Output Capacitor Requirement
The TS39105 requires an output capacitor to maintain stability and improve transient response is necessary. The
value of this capacitor is dependent upon the output current, lower currents allow smaller capacitors. TS39105 output
capacitor selection is dependent upon the ESR of the output capacitor to maintain stability. When the output capacitor
is 10uF or greater, the output capacitor should have an ESR less than 2Ω. This will improve transient response as well
as promote stability. Ultra low ESR capacitors (<100mΩ), such as ceramic chip capacitors, may promote instability.
These very low ESR levels may cause an oscillation and/or under damped transient response. A low ESR solid
tantalum capacitor works extremely well and provides good transient response and stability over temperature
aluminum electrolytes can also be used, as long as the ESR of the capacitor is <2Ω. The value of the output capacitor
can be increased without limit. Higher capacitance values help to improve transient response and ripple rejection and
reduce output noise.
Input Capacitor Requirement
An input capacitor of 1uF or greater is recommended when the device is more than 4” away from the bulk AC supply
capacitance or when the supply is a battery. Small, surface mount, ceramic chip capacitors can be used for bypassing.
Larger values will help to improve ripple rejection by bypassing the input to the regulator, further improving the integrity
of the output voltage.
Minimum Load Current
The TS39105 is specified between finite loads. If the output current is too small leakage currents dominate and the
output voltage rises. A 10mA minimum load current is necessary for proper regulation
3/7
Version: A08
TS39105
1A Ultra Low LDO with Enable
Application Information (Continue)
Enable Input
TS39105 versions feature an active-high enable (EN) input that allows ON/OFF control of the regulator. Current drain
reduces to “zero” when the device is shutdown, with only micro-amperes of leakage current. The EN input has
TTL/CMOS compatible thresholds for simple interfacing with logic interfacing. EN may be directly tied to V
iN
and pulled
up to the maximum supply voltage.
Transient Response and 3.3V to 2.5V or 2.5V to 1.8V Conversion
TS39105 has excellent transient response to variations in input voltage and load current. The device have been
designed to respond quickly to load current variations and input voltage variations. Large output capacitors are not
required to obtain this performance. A standard 10uF output capacitor, preferably tantalum, is all that is required.
Larger values help to improve performance even further. By virtue of its low dropout voltage, this device does not
saturate into dropout as readily as similar NPN base designs. When converting from 3.3V to 2.5V or 2.5V to 1.8V, the
NPN based regulators are already operating in dropout, with typical dropout requirements of 1.2V or greater,. To
convert down to 2.5V or 1.8V without operating in dropout, NPN based regulators require an input voltage of 3.7V at
the very least. The TS39105 will provide excellent performance with an input as low as 3.0V or 2.5V respectively. This
gives the PNP based regulators a distinct advantage over older, NPN based linear regulators.
Power Dissipation
From under curves, the minimum area of copper necessary for the par to operate safely can be determined. The
maximum allowable temperature rise must be calculated to determine operation along which curve.
Copper area lay out information
Determine the power dissipation requirements for the design along with the maximum ambient temperature at which
the device will be operated. Refer to power dissipation with copper area curve, which shows safe operating curves for
o
o
o
three different ambient temperatures with 25 C, 50 C, 85 C. From these curves, the minimum amount of copper can
be determined by knowing the maximum power dissipation required.
P
D
= (V
IN
- V
OUT
) * I
OUT
+ V
IN
* I
GND
If we used a 5.0V output device and a 6V input at an output current of 350mA, then the power dissipation is as follows:
P
D
= (6.0V- 5.0V) * 350mA + 5V * 4mA
P
D
= 350mW + 20mW
P
D
= 370mW
If the maximum ambient temperature is 85 C and the power dissipation is as above 375mW, the curve is shows that
2
the required area of copper is 80mm .
4/7
Version: A08
o
TS39105
1A Ultra Low LDO with Enable
TO-252-4L Mechanical Drawing
DIM
A
A1
b
b1
b2
b3
C
C1
C2
D
D1
E
E1
e
H
L
L1
L2
L3
L4
θ
θ1
TO-252-4L DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX.
2.210
2,387
0.087
0.093
0.010
0.127
0.000
0.005
0.584
0.660
0.023
0.026
0.559
0.635
0.022
0.025
0.500
0.510
0.020
0.020
5.232
5.436
0.206
0.214
0.509
0.559
0.020
0.022
0.457
0.533
0.018
0.021
0.483
0.584
0.019
0.023
6.000
6.200
0.236
0.244
5.415
5.515
0.213
0.217
6.400
6.604
0.252
0.260
4.902
5.004
0.193
0.197
1.27 BSC
0.05 BSC
9.601
10.21
0.377
0.402
1.397
1.651
0.055
0.065
2.743 REF
0.108 REF
0.508 REF
0.02 REF
1.100 REF
0.043 REF
0.660
0.940
0.025
0.037
0º
8º
0º
8º
7º REF
7º REF
Marking Diagram
Y
M
= Year Code
= Month Code
(A=Jan,
B=Feb, C=Mar, D=Apl, E=May, F=Jun, G=Jul, H=Aug, I=Sep,
J=Oct, K=Nov, L=Dec)
= Lot Code
= Output Voltage
(18=1.8V,
25=2.5V,
33=3.3V, 50=5V)
L
XX
5/7
Version: A08
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