EP20K60EQC240-2XN datasheet, PDF

EP20K60EQC240-2XN: DescriptionLoadable PLD, 2.41ns, CMOS, PQFP240, PLASTIC, QFP-240; CategoryProgrammable logic devices Programmable logic; File Size1MB，132 Pages; ManufacturerAltera (Intel); Environmental Compliance

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EP20K60EQC240-2XN Overview

Loadable PLD, 2.41ns, CMOS, PQFP240, PLASTIC, QFP-240

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Altera (Intel)
Parts packaging code	QFP
package instruction	FQFP,
Contacts	240
Reach Compliance Code	compliant
maximum clock frequency	160 MHz
JESD-30 code	S-PQFP-G240
JESD-609 code	e3
length	32 mm
Humidity sensitivity level	3
Dedicated input times	4
Number of I/O lines	151
Number of terminals	240
Maximum operating temperature	85 °C
Minimum operating temperature
organize	4 DEDICATED INPUTS, 151 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	FQFP
Package shape	SQUARE
Package form	FLATPACK, FINE PITCH
Peak Reflow Temperature (Celsius)	245
Programmable logic type	LOADABLE PLD
propagation delay	2.41 ns
Certification status	Not Qualified
Maximum seat height	4.1 mm
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	MATTE TIN (472) OVER COPPER
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	32 mm

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