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FEATURES
Fast 12-Bit ADC with 1.47 s Conversion Time
600 kSPS Throughput Rate (AD7892-3)
500 kSPS Throughput Rate (AD7892-1, AD7892-2)
Single Supply Operation
On-Chip Track/Hold Amplifier
Selection of Input Ranges:
10 V or 5 V for AD7892-1
0 V to +2.5 V for AD7892-2
2.5 V for AD7892-3
High Speed Serial and Parallel Interface
Low Power, 60 mW typ
Overvoltage Protection on Analog Inputs (AD7892-1
and AD7892-3)
2k
LC
2
MOS Single Supply,
12-Bit 600 kSPS ADC
AD7892
FUNCTIONAL BLOCK DIAGRAM
REF OUT/REF IN
V
DD
+2.5V
REFERENCE
DB0
DB2
DB3/RFS
12-BIT
V
IN1
V
IN2
ADC
SIGNAL
SCALING
TRACK/HOLD
CLOCK
CONTROL LOGIC
DB4/SCLK
DB5/SDATA
DB10/LOW
DB11/LOW
AD7892
MODE
CS
RD
EOC CONVST
AGND DGND
STANDBY
GENERAL DESCRIPTION
The AD7892 is a high speed, low power, 12-bit A/D converter
that operates from a single +5 V supply. The part contains a
1.47
µs
successive approximation ADC, an on-chip track/hold
amplifier, an internal +2.5 V reference and on-chip versatile
interface structures that allow both serial and parallel connec-
tion to a microprocessor. The part accepts an analog input range
of
±
10 V or
±
5 V (AD7892-1), 0 V to +2.5 V (AD7892-2) and
±
2.5 V (AD7892-3). Overvoltage protection on the analog inputs
for the AD7892-1 and AD7892-3 allows the input voltage to go
to
±
17 V or
±
7 V respectively without damaging the ports.
The AD7892 offers a choice of two data output formats: a
single, parallel, 12-bit word or serial data. Fast bus access times
and standard control inputs ensure easy parallel interface to
microprocessors and digital signal processors. A high speed
serial interface allows direct connection to the serial ports of
microcontrollers and digital signal processors.
In addition to the traditional dc accuracy specifications such as
linearity, full-scale and offset errors, the part is also specified for
dynamic performance parameters including harmonic distortion
and signal-to-noise ratio.
The AD7892 is fabricated in Analog Devices’ Linear Compat-
ible CMOS (LC
2
MOS) process, a mixed technology process
that combines precision bipolar circuits with low power CMOS
logic. It is available in a 24-lead, 0.3" wide, plastic or hermetic
DIP or in a 24-lead SOIC.
PRODUCT HIGHLIGHTS
1. The AD7892-3 features a conversion time of 1.47
µs
and a
track/hold acquisition time of 200 ns. This allows a through-
put rate for the part up to 600 kSPS. The AD7892-1 and
AD7892-2 operate with throughput rates of 500 kSPS.
2. The AD7892 operates from a single +5 V supply and con-
sumes 60 mW typ making it ideal for low power and portable
applications.
3. The part offers a high speed, flexible interface arrangement
with parallel and serial interfaces for easy connection to
microprocessors, microcontrollers and digital signal
processors.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD7892–SPECIFICATIONS
Parameter
DYNAMIC PERFORMANCE
AD7892-1, AD7892-2
Signal to (Noise + Distortion) Ratio
3
Total Harmonic Distortion
3
Peak Harmonic or Spurious Noise
3
Intermodulation Distortion
3
2nd Order Terms
3rd Order Terms
AD7892-3
Signal to (Noise + Distortion) Ratio
3
Total Harmonic Distortion
3
Peak Harmonic or Spurious Noise
3
Intermodulation Distortion
3
2nd Order Terms
3rd Order Terms
DC ACCURACY
Resolution
Minimum Resolution for Which No
Missing Codes Are Guaranteed
Relative Accuracy
3
Differential Nonlinearity
3
AD7892-1
Positive Full-Scale Error
3
Negative Full-Scale Error
3
Bipolar Zero Error
3
AD7892-3
Positive Full-Scale Error
3
Negative Full-Scale Error
3
Bipolar Zero Error
3
AD7892-2
Positive Full-Scale Error
3
Unipolar Offset Error
3
ANALOG INPUT
AD7892-1
Input Voltage Range
Input Voltage Range
Input Resistance
AD7892-2
Input Voltage Range on V
IN1
Input Current
Input Voltage Range on V
IN2
AD7892-3
Input Voltage Range on V
IN1
Input Resistance
REFERENCE OUTPUT/INPUT
REF IN Input Voltage Range
Input Impedance
Input Capacitance
4
REF OUT Output Voltage
REF OUT Error @ +25°C
T
MIN
to T
MAX
REF OUT Temperature Coefficient
REF OUT Output Impedance
LOGIC INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN4
A Versions
1
70
–78
–79
–78
–78
70
–78
–79
–78
–78
12
12
±
1.5
±
1
±
4
±
4
±
3
±
4
±
4
±
4
±
5
±
4
(V
DD
= +5 V 5%, AGND = DGND = 0 V, REF IN = +2.5 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
S Version
2
Unit
Test Conditions/Comments
f
IN
= 100 kHz. f
SAMPLE
= 500 kSPS
B Versions
70
–78
–79
–78
–78
70
–78
–79
–78
–78
12
12
±
1
±
1
±
4
±
4
±
2
±
4
±
4
±
3
±
5
±
3
70
–78
–79
–78
–78
dB min
dB max
dB max
dB max
dB max
dB min
dB max
dB max
typ –84 dB
fa = 49 kHz, fb = 50 kHz
typ –84 dB
typ –84 dB
f
IN
= 100 kHz. f
SAMPLE
= 600 kSPS
fa = 49 kHz, fb = 50 kHz
dB max
dB max
12
12
±
1
±
1
±
5
±
5
±
3
Bits
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
LSB max
±
5
±
4
LSB max
LSB max
±
10
±
5
8
0 to +2.5
10
±
50
±
2.5
2
2.375/2.625
1.6
10
2.5
±
10
±
20
25
5.5
2.4
0.8
±
10
10
±
10
±
5
8
0 to +2.5
10
±
50
±
2.5
2
2.375/2.625
1.6
10
2.5
±
10
±
20
25
5.5
2.4
0.8
±
10
10
±
10
±
5
8
0 to +2.5
50
±
50
Volts
Volts
kΩ min
Volts
nA max
mV max
Volts
kΩ min
Input Applied to V
IN1
with V
IN2
Grounded
Input Applied to V
IN1
and V
IN2
Input Applied to V
IN1
with V
IN2
Grounded
Input Applied to V
IN1
Input Applied to V
IN1
2.375/2.625
1.6
10
2.5
±
10
±
25
25
5.5
2.4
0.8
±
10
10
V min/V max
kΩ min
pF max
V nom
mV max
mV max
ppm/°C typ
kΩ nom
V min
V max
µA
max
pF max
2.5 V
±
5%
Resistor Connected to Internal Reference Node
V
DD
= 5 V
±
5%
V
DD
= 5 V
±
5%
V
IN
= 0 V to V
DD
–2–
REV. C
AD7892
Parameter
LOGIC OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
DB11–DB0
Floating-State Leakage Current
Floating-State Capacitance
4
Output Coding
AD7892-1 and AD7892-3
AD7892-2
CONVERSION RATE
Conversion Time
Track/Hold Acquisition Time
3
Conversion Time
Track/Hold Acquisition Time
3
POWER REQUIREMENTS
V
DD
I
DD5
Normal Operation
Standby Mode
6
AD7892-2
AD7892-3, AD7892-1
Power Dissipation
5
Normal Operation
Standby Mode
6
AD7892-2
AD7892-3, AD7892-1
A Versions
1
4.0
0.4
±
10
15
B Versions
4.0
0.4
±
10
15
S Version
2
4.0
0.4
±
10
15
Unit
V min
V max
µA
max
pF max
Test Conditions/Comments
I
SOURCE
= 200
µA
I
SINK
= 1.6 mA
Two’s Complement
Straight (Natural) Binary
1.47
0.2
1.6
0.4
+5
18
250
80
90
1.25
400
1.47
0.2
1.6
0.4
+5
18
250
80
90
1.25
400
µs
max
µs
max
µs
max
µs
max
V nom
mA max
µA
typ
µA
max
mW max
mW typ
µW
max
AD7892-3
AD7892-3
AD7892-1 and AD7892-2
AD7892-1 and AD7892-2
±
5% for Specified Performance
1.68
0.32
+5
19
100
95
typ 15
µA
V
DD
= +5 V. Typically 60 mW
500
V
DD
= +5 V. Typically 75
µW
NOTES
1
Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S Version: –55°C to +125°C.
2
S Version available on AD7892-1 and AD7892-2 only.
3
See Terminology.
4
Sample tested @ +25°C to ensure compliance.
5
These normal mode and standby mode currents are achieved with resistors (in the range 10 kΩ to 100 kΩ) to either DGND or V
DD
on Pins 8, 9, 16 and 17.
6
A conversion should not be initiated on the part within 30
µs
of exiting standby mode.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Analog Input Voltage to AGND
AD7892-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
17 V
AD7892-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
AD7892-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
7 V
Reference Input Voltage to AGND . . . –0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to DGND . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40°C to +85°C
Extended (S Version) . . . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 105°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +260°C
Cerdip Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 70°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300°C
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
REV. C
–3–
AD7892
TIMING CHARACTERISTICS
1, 2
(V
Parameter
t
CONV
t
ACQ
Parallel Interface
t
1
t
2
t
3
t
4
t
5
t
6 3
t
7 4
t
8
t
9
Serial Interface
t
10
t
113
t
12
t
13
t
143
t
153
t
16
t
174
t
17A4
A, B
Versions
1.47
1.6
200
400
35
60
0
0
35
35
5
30
0
200
30
25
25
25
5
25
20
0
30
0
30
DD
= +5 V
5%, AGND = DGND = 0 V, REF IN = +2.5 V)
Unit
µs
max
µs
max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns max
ns min
ns min
ns min
ns max
ns min
ns min
ns min
ns max
ns min
ns min
ns max
ns min
ns max
Test Conditions/Comments
Conversion Time for AD7892-3
Conversion Time for AD7892-1, AD7892-2
Acquisition Time for AD7892-3
Acquisition Time for AD7892-1, AD7892-2
CONVST
Pulsewidth
EOC
Pulsewidth
EOC
Falling Edge to
CS
Falling Edge Setup Time
CS
to
RD
Setup Time
Read Pulsewidth
Data Access Time After Falling Edge of
RD
Bus Relinquish Time After Rising Edge of
RD
CS
to
RD
Hold Time
RD
to
CONVST
Setup Time
RFS
Low to SCLK Falling Edge Setup Time
RFS
Low to Data Valid Delay
SCLK High Pulsewidth
SCLK Low Pulsewidth
SCLK Rising Edge to Data Valid Hold Time
SCLK Rising Edge to Data Valid Delay
RFS
to SCLK Falling Edge Hold Time
Bus Relinquish Time after Rising Edge of
RFS
Bus Relinquish Time after Rising Edge of SCLK
S
Version
1.68
320
45
60
0
0
45
40
5
40
0
200
35
30
25
25
5
30
30
0
30
0
30
NOTES
1
Sample tested at +25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of +5 V) and timed from a voltage level of +1.6 V.
2
See Figures 2 and 3.
3
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
4
These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of external bus loading capacitances.
5
Assumes CMOS loads on the data bits. With TTL loads, more current is drawn from the data lines and the
RD
to
CONVST
time needs to be extended to 400 ns min.
Specifications subject to change without notice.
1.6mA
TO
OUTPUT
PIN
50pF
+1.6V
200 A
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7892 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. C
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