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74AUP2G08GF

Description
AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8
Categorylogic    logic   
File Size369KB,24 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74AUP2G08GF Overview

AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8

74AUP2G08GF Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instructionVSON,
Reach Compliance Codecompliant
seriesAUP/ULP/V
JESD-30 codeR-PDSO-N8
JESD-609 codee3
length1.35 mm
Logic integrated circuit typeAND GATE
Humidity sensitivity level1
Number of functions2
Number of entries2
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)24 ns
Maximum seat height0.5 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formNO LEAD
Terminal pitch0.35 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1 mm
Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
salesaddresses@nexperia.com).
Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia

74AUP2G08GF Related Products

74AUP2G08GF 74AUP2G08GD 74AUP2G08GM 74AUP2G08DC 74AUP2G08GT 74AUP2G08GN 74AUP2G08GS
Description AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8 AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8 AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PQCC8 AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8 AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8 AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8 AND Gate, AUP/ULP/V Series, 2-Func, 2-Input, CMOS, PDSO8
Is it Rohs certified? conform to conform to conform to conform to conform to conform to conform to
Maker Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
package instruction VSON, VSON, VQCCN, VSSOP, VSON, SON, VSON,
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant
series AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 code R-PDSO-N8 R-PDSO-N8 S-PQCC-N8 R-PDSO-G8 R-PDSO-N8 R-PDSO-N8 R-PDSO-N8
JESD-609 code e3 e4 e4 e4 e3 e3 e3
length 1.35 mm 3 mm 1.6 mm 2.3 mm 1.95 mm 1.2 mm 1.35 mm
Logic integrated circuit type AND GATE AND GATE AND GATE AND GATE AND GATE AND GATE AND GATE
Humidity sensitivity level 1 1 1 1 1 1 1
Number of functions 2 2 2 2 2 2 2
Number of entries 2 2 2 2 2 2 2
Number of terminals 8 8 8 8 8 8 8
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code VSON VSON VQCCN VSSOP VSON SON VSON
Package shape RECTANGULAR RECTANGULAR SQUARE RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE CHIP CARRIER, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260 260 260 260 NOT SPECIFIED NOT SPECIFIED
propagation delay (tpd) 24 ns 24 ns 24 ns 24 ns 24 ns 24 ns 24 ns
Maximum seat height 0.5 mm 0.5 mm 0.5 mm 1 mm 0.5 mm 0.35 mm 0.35 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Tin (Sn) Tin (Sn) Tin (Sn)
Terminal form NO LEAD NO LEAD NO LEAD GULL WING NO LEAD NO LEAD NO LEAD
Terminal pitch 0.35 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm 0.3 mm 0.35 mm
Terminal location DUAL DUAL QUAD DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED 30 30 30 30 NOT SPECIFIED NOT SPECIFIED
width 1 mm 2 mm 1.6 mm 2 mm 1 mm 1 mm 1 mm
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