EEWORLDEEWORLDEEWORLD

Part Number

Search

C1206T180D2GAL

Description
Ceramic Capacitor, Multilayer, Ceramic, 200V, 2.78% +Tol, 2.78% -Tol, C0G, 30ppm/Cel TC, 0.000018uF, Surface Mount, 1206, CHIP
CategoryPassive components    capacitor   
File Size1MB,18 Pages
ManufacturerKEMET
Websitehttp://www.kemet.com
Download Datasheet Parametric View All

C1206T180D2GAL Overview

Ceramic Capacitor, Multilayer, Ceramic, 200V, 2.78% +Tol, 2.78% -Tol, C0G, 30ppm/Cel TC, 0.000018uF, Surface Mount, 1206, CHIP

C1206T180D2GAL Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
package instruction, 1206
Reach Compliance Codenot_compliant
ECCN codeEAR99
capacitance0.000018 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
high0.78 mm
JESD-609 codee0
length3.2 mm
Manufacturer's serial numberC
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance2.7778%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package shapeRECTANGULAR PACKAGE
Package formSMT
method of packingTR, PAPER/PLASTIC, 7/13 INCH
positive tolerance2.7778%
Rated (DC) voltage (URdc)200 V
seriesC(SIZE)T(C0G)-COTS
size code1206
surface mountYES
Temperature characteristic codeC0G
Temperature Coefficient30ppm/Cel ppm/°C
Terminal surfaceTin/Lead (Sn90Pb10) - with Nickel (Ni) barrier
Terminal shapeWRAPAROUND
width1.6 mm
Base Number Matches1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-the-Shelf (COTS) for Higher Reliability
Applications, C0G Dielectric, 10VDC-200VDC
Overview
KEMET’s COTS program is an extension of KEMET knowledge
of high reliability test regimes and requirements. KEMET regularly
supplies “up-screened” products by working with customer drawings
and imposing specified design and test requirements. The COTS
program offers the same high quality and high reliability components
as up-screened products, but at a lower cost to the customer. This is
accomplished by eliminating the need for customer-specific drawings
to achieve the reliability level required for customer applications. A
series of tests and inspections have been selected to provide the
accelerated conditioning and 100% screening necessary to eliminate
infant mortal failures from the population.
KEMET’s C0G dielectric features a 125°C maximum operating
temperature and is considered “stable.” The Electronics
Components, Assemblies & Materials Association (EIA)
characterizes C0G dielectric as a Class I material. Components
of this classification are temperature compensating and are suited
for resonant circuit applications or those where Q and stability of
capacitance characteristics are required. C0G exhibits no change in
capacitance with respect to time and voltage and boasts a negligible
change in capacitance with reference to ambient temperature.
Capacitance change is limited to ±30ppm/ºC from -55°C to +125°C.
All COTS testing includes voltage conditioning and post-electrical
testing as per MIL-PRF-55681. For enhanced reliability, KEMET
also provides the following test level options and conformance
certifications:
Test Level A
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8%
C of C
Test Level B
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8%
DPA
C of C
Test Level C
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8%
DPA
85/85
C of C
Ordering Information
C
Ceramic
1206
T
104
Capacitance
Code (pF)
2 Sig. Digits +
Number of Zeros
Use 9 for
1.0 - 9.9pF
Use 8 for
0.5 - .99pF
ex. 2.2pF = 229
ex. 0.5pF = 508
K
5
G
Dielectric
A
Failure Rate/Design
C
Termination Finish
2
TU
Packaging/Grade
(C-Spec)
3
Blank = Bulk
TU = 7" Reel
Unmarked
TM = 7" Reel
Marked
Case Size Specification/
(L" x W")
Series
0402
0603
0805
1206
1210
1812
2220
T = COTS
Capacitance
Voltage
Tolerance
1
C = ±0.25pF
D = ±0.5pF
F = ± 1%
G = ±2%
J = ±5%
K = ±10%
M = ±20%
8 = 10V
4 = 16V
3 = 25V
6 = 35V
5 = 50V
1 = 100V
2 = 200V
G = C0G A = Group A Testing per C = 100% Matte Sn
MIL-PRF-55681 PDA 8% L = SnPb (5% min)
B= Group A Testing per
MIL-PRF-55681 PDA
8%, DPA per EIA-469
C = Group A Testing per
MIL-PRF-55681 PDA 8%,
DPA per EIA-469, Humidity
per MIL-STD-202, Method
103, Condition A
Additional capacitance tolerance offerings may be available. Contact KEMET for details.
Additional termination finish options may be available. Contact KEMET for details.
3
Additional reeling or packaging options may be available. Contact KEMET for details.
1
2
One WORLD
One Brand
One Strategy
One Focus
One Team
One KEMET
C1026_COTS_C0G • 6/6/2011
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
【FAQ】Microchip Live|Secure configuration of MPU in your factory
Live Topic : Microchip Live | Secure Configuration of MPUs in Your FactoryContent Introduction: Secure provisioning is a process that allows you to securely instantiate a microprocessor (MPU) root of ...
EEWORLD社区 Security Electronics
Two MCU Programming Ideas
Layered thinkingThe layered thinking is not something mysterious. In fact, many engineers who do projects also use it. I have read many posts and found that this thing is not mentioned. However, the l...
火辣西米秀 Microcontroller MCU
How to use TMS320C6416 timer 1 interrupt
Software development environment: CCS3.1, set to Simulator mode in CCS Setup CPU:TMS320C6416The project contains three files: main.c, Vectors.asm, BootLoader.cmd In addition, a library file was added:...
灞波儿奔 DSP and ARM Processors
Program burning failed
The program I wrote failed to burn, but the reference code given by others burned successfully. The compiler is CodeWarrior. The chip is MC9S08AW60. The device manager USB MultiLink 2.0 runs normally....
~aaaa MCU
What op amp circuit is this?
[i=s]This post was last edited by sfcsdc on 2019-4-12 10:28[/i] What are the functions of these two op amps? Please help me analyze them. What are the four capacitors at the input of the first op amp ...
sfcsdc Analog electronics
Serial port idle interrupt cannot be cleared - Solved
USART_ClearITPendingBit( UART4, USART_IT_IDLE); This usage is wrong!/*** [url=home.php?mod=spaceuid=159083]@brief[/url] Clears the USARTx's interrupt pending bits.* @paramUSARTx: Select the USART or t...
liu583685 stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号