CY7C330-50JC datasheet, PDF - EEWORLD Datasheet

CY7C330-50JC: DescriptionOT PLD, 20ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28; CategoryProgrammable logic devices Programmable logic; File Size474KB，11 Pages; ManufacturerCypress Semiconductor

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CY7C330-50JC Overview

OT PLD, 20ns, PAL-Type, CMOS, PQCC28, PLASTIC, LCC-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	QLCC
package instruction	PLASTIC, LCC-28
Contacts	28
Reach Compliance Code	not_compliant
Other features	SYNCHRONOUS STATE MACHINE; 12 I/O MACROCELLS; 3 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
Architecture	PAL-TYPE
maximum clock frequency	50 MHz
JESD-30 code	S-PQCC-J28
JESD-609 code	e0
length	11.5316 mm
Dedicated input times	9
Number of I/O lines	12
Number of entries	23
Output times	12
Number of product terms	256
Number of terminals	28
Maximum operating temperature	75 °C
Minimum operating temperature
organize	9 DEDICATED INPUTS, 12 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC28,.5SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	OT PLD
propagation delay	20 ns
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.5316 mm
Base Number Matches	1

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