AMD-K6/166ALR datasheet, PDF - EEWORLD Datasheet

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AMD-K6/166ALR: Description32-BIT, 166MHz, RISC PROCESSOR, CPGA321, STAGGERED, CERAMIC, PGA-321; CategoryThe embedded processor and controller Microcontrollers and processors; File Size7MB，346 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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AMD-K6/166ALR Overview

32-BIT, 166MHz, RISC PROCESSOR, CPGA321, STAGGERED, CERAMIC, PGA-321

AMD-K6/166ALR Parametric

Parameter Name	Attribute value
Parts packaging code	PGA
package instruction	IPGA,
Contacts	321
Reach Compliance Code	unknown
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	66.66 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	NO
JESD-30 code	S-CPGA-P321
length	49.53 mm
low power mode	YES
Number of DMA channels
Number of external interrupt devices	3
Number of serial I/Os
Number of terminals	321
On-chip data RAM width
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	IPGA
Package shape	SQUARE
Package form	GRID ARRAY, INTERSTITIAL PITCH
Certification status	Not Qualified
RAM (number of words)	0
Maximum seat height	3.63 mm
speed	166 MHz
Maximum slew rate	6250 mA
Maximum supply voltage	3.6 V
Minimum supply voltage	2.755 V
Nominal supply voltage	3 V
surface mount	NO
technology	MOS
Temperature level	COMMERCIAL
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	49.53 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC
Base Number Matches	1

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AMD-K6/166ALR Related Products

	AMD-K6/166ALR	AMD-K6/200ALR	AMD-K6/233ANR
Description	32-BIT, 166MHz, RISC PROCESSOR, CPGA321, STAGGERED, CERAMIC, PGA-321	32-BIT, 200MHz, RISC PROCESSOR, CPGA321, STAGGERED, CERAMIC, PGA-321	32-BIT, 233 MHz, RISC PROCESSOR, CPGA321, STAGGERED, CERAMIC, PGA-321
Parts packaging code	PGA	PGA	PGA
package instruction	IPGA,	STAGGERED, CERAMIC, PGA-321	IPGA,
Contacts	321	321	321
Reach Compliance Code	unknown	unknown	unknow
Address bus width	32	32	32
bit size	32	32	32
boundary scan	YES	YES	YES
maximum clock frequency	66.66 MHz	66.66 MHz	66.66 MHz
External data bus width	64	64	64
Format	FLOATING POINT	FLOATING POINT	FLOATING POINT
Integrated cache	NO	NO	NO
JESD-30 code	S-CPGA-P321	S-CPGA-P321	S-CPGA-P321
length	49.53 mm	49.53 mm	49.53 mm
low power mode	YES	YES	YES
Number of external interrupt devices	3	3	3
Number of terminals	321	321	321
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	IPGA	IPGA	IPGA
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH	GRID ARRAY, INTERSTITIAL PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.63 mm	3.63 mm	3.63 mm
speed	166 MHz	200 MHz	233 MHz
Maximum slew rate	6250 mA	7500 mA	9500 mA
Maximum supply voltage	3.6 V	3.6 V	3.6 V
Minimum supply voltage	2.755 V	2.755 V	3.1 V
Nominal supply voltage	3 V	3 V	3 V
surface mount	NO	NO	NO
technology	MOS	MOS	MOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
width	49.53 mm	49.53 mm	49.53 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC
Maker	-	AMD	AMD

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