UPD421001LA-10 datasheet, PDF - EEWORLD Datasheet

UPD421001LA-10: Description1MX1 NIBBLE MODE DRAM, 100ns, PDSO20, PLASTIC, SOJ-26/20; Categorystorage storage; File Size307KB，14 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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UPD421001LA-10 Overview

1MX1 NIBBLE MODE DRAM, 100ns, PDSO20, PLASTIC, SOJ-26/20

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	SOJ
package instruction	SOJ,
Contacts	20
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	NIBBLE
Maximum access time	100 ns
Other features	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
JESD-30 code	R-PDSO-J20
length	17.4 mm
memory density	1048576 bit
Memory IC Type	NIBBLE MODE DRAM
memory width	1
Number of functions	1
Number of ports	1
Number of terminals	20
word count	1048576 words
character code	1000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1MX1
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	SOJ
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Certification status	Not Qualified
refresh cycle	512
Maximum seat height	3.7 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	DUAL
width	7.57 mm
Base Number Matches	1

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