ISPLSI2032VE-135LT49 datasheet, PDF

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ISPLSI2032VE-135LT49: DescriptionEE PLD, 7.5ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49; CategoryProgrammable logic devices Programmable logic; File Size517KB，16 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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ISPLSI2032VE-135LT49 Overview

EE PLD, 7.5ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49

ISPLSI2032VE-135LT49 Parametric

Parameter Name	Attribute value
Parts packaging code	BGA
package instruction	LFBGA,
Contacts	49
Reach Compliance Code	unknown
ECCN code	EAR99
maximum clock frequency	135 MHz
JESD-30 code	S-PBGA-B49
length	7 mm
Dedicated input times
Number of I/O lines	32
Number of terminals	49
Maximum operating temperature	70 °C
Minimum operating temperature
organize	0 DEDICATED INPUTS, 32 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	LFBGA
Package shape	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH
Programmable logic type	EE PLD
propagation delay	7.5 ns
Maximum seat height	1.5 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
width	7 mm
Base Number Matches	1

ISPLSI2032VE-135LT49 Related Products

	ISPLSI2032VE-135LT49	ISPLSI2032VE-300LT49	ISPLSI2032VE-110LT49	ISPLSI2032VE-180LT49	ISPLSI2032VE-225LT49
Description	EE PLD, 7.5ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49	EE PLD, 3ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49	EE PLD, 10ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49	EE PLD, 5ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49	EE PLD, 4ns, CMOS, PBGA49, 7 X 7 MM, 0.80 MM PITCH, FBGA-49
Parts packaging code	BGA	BGA	BGA	BGA	BGA
package instruction	LFBGA,	LFBGA,	LFBGA,	LFBGA,	LFBGA,
Contacts	49	49	49	49	49
Reach Compliance Code	unknown	unknow	unknown	unknown	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
maximum clock frequency	135 MHz	300 MHz	110 MHz	180 MHz	225 MHz
JESD-30 code	S-PBGA-B49	S-PBGA-B49	S-PBGA-B49	S-PBGA-B49	S-PBGA-B49
length	7 mm	7 mm	7 mm	7 mm	7 mm
Number of I/O lines	32	32	32	32	32
Number of terminals	49	49	49	49	49
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C
organize	0 DEDICATED INPUTS, 32 I/O	0 DEDICATED INPUTS, 32 I/O	0 DEDICATED INPUTS, 32 I/O	0 DEDICATED INPUTS, 32 I/O	0 DEDICATED INPUTS, 32 I/O
Output function	MACROCELL	MACROCELL	MACROCELL	MACROCELL	MACROCELL
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LFBGA	LFBGA	LFBGA	LFBGA	LFBGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH	GRID ARRAY, LOW PROFILE, FINE PITCH
Programmable logic type	EE PLD	EE PLD	EE PLD	EE PLD	EE PLD
propagation delay	7.5 ns	3 ns	10 ns	5 ns	4 ns
Maximum seat height	1.5 mm	1.5 mm	1.5 mm	1.5 mm	1.5 mm
Maximum supply voltage	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	BALL	BALL	BALL	BALL	BALL
Terminal pitch	0.8 mm	0.8 mm	0.8 mm	0.8 mm	0.8 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	7 mm	7 mm	7 mm	7 mm	7 mm
Base Number Matches	1	1	1	1	-

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