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X28HC256EMB-15

Description
5 Volt, Byte Alterable E2PROM
File Size864KB,19 Pages
ManufacturerIntersil ( Renesas )
Websitehttp://www.intersil.com/cda/home/
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X28HC256EMB-15 Overview

5 Volt, Byte Alterable E2PROM

DATASHEET
X28HC256
256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM
The
X28HC256
is a second generation high performance
CMOS 32k x 8 EEPROM. It is fabricated with Intersil’s
proprietary, textured poly floating gate technology, providing a
highly reliable 5V only nonvolatile memory.
The X28HC256 supports a 128-byte page write operation,
effectively providing a 24µs/byte write cycle, and enabling the
entire memory to be typically rewritten in less than 0.8s. The
X28HC256 also features DATA polling and Toggle bit polling,
two methods of providing early end of write detection. The
X28HC256 also supports the JEDEC standard software data
protection feature for protecting against inadvertent writes
during power-up and power-down.
Endurance for the X28HC256 is specified as a minimum
100,000 write cycles per byte and an inherent data retention
of 100 years.
FN8108
Rev 5.00
August 27, 2015
Features
• Access time: 90ns
• Simple byte and page write
- Single 5V supply
- No external high voltages or V
P-P
control circuits
- Self timed
- No erase before write
- No complex programming algorithms
- No overerase problem
• Low power CMOS
- Active: 60mA
- Standby: 500µA
• Software data protection
- Protects data against system level inadvertent writes
• High speed page write capability
• Highly reliable Direct Write
cell
- Endurance: 100,000 cycles
- Data retention: 100 years
• Early end of write detection
- DATA polling
- Toggle bit polling
• RoHS compliant
X BUFFERS
LATCHES AND
DECODER
A
0
TO A
14
ADDRESS
INPUTS
Y BUFFERS
LATCHES AND
DECODER
256k BIT
EEPROM
ARRAY
I/O BUFFERS
AND LATCHES
I/O
0
TO I/O
7
CE
OE
WE
V
CC
V
SS
CONTROL
LOGIC AND
TIMING
DATA INPUTS/OUTPUTS
FIGURE 1. BLOCK DIAGRAM
FN8108 Rev 5.00
August 27, 2015
Page 1 of 19

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