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STM8S205C6T6

Description
8-BIT, FLASH, 16MHz, MICROCONTROLLER, PQFP48, 7 X 7 MM, ROHS COMPLIANT, LQFP-48
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size2MB,96 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Download Datasheet Parametric View All

STM8S205C6T6 Overview

8-BIT, FLASH, 16MHz, MICROCONTROLLER, PQFP48, 7 X 7 MM, ROHS COMPLIANT, LQFP-48

STM8S205C6T6 Parametric

Parameter NameAttribute value
Parts packaging codeQFP
package instructionLFQFP, QFP48,.35SQ,20
Contacts48
Reach Compliance Codecompliant
Has ADCYES
Address bus width
bit size8
CPU seriesSTM8
maximum clock frequency16 MHz
DAC channelNO
DMA channelNO
External data bus width
JESD-30 codeS-PQFP-G48
length7 mm
Number of I/O lines38
Number of terminals48
On-chip program ROM width32
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeLFQFP
Encapsulate equivalent codeQFP48,.35SQ,20
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE, FINE PITCH
power supply3.3/5 V
Certification statusNot Qualified
RAM (bytes)2048
rom(word)1024
ROM programmabilityFLASH
Maximum seat height1.6 mm
speed16 MHz
Maximum slew rate60 mA
Maximum supply voltage5.5 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationQUAD
width7 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER
Base Number Matches1
STM8S20xxx
Performance line, 24 MHz STM8S 8-bit MCU, up to 128 Kbytes Flash,
integrated EEPROM,10-bit ADC, timers, 2 UARTs, SPI, I²C, CAN
Features
Core
Max f
CPU
: up to 24 MHz,
0 wait states @ f
CPU
16 MHz
Advanced STM8 core with Harvard
architecture and 3-stage pipeline
Extended instruction set
LQFP64 10x10
LQFP80 14x14
LQFP44 10x10
Max. 20 MIPS @ 24 MHz
LQFP48 7x7
LQFP32 7x7
Memories
Program memory: Up to 128 Kbytes Flash;
data retention 20 years at 55°C after 10 kcycles
Data memory: Up to 2 Kbytes true data
EEPROM; endurance 300 kcycles
RAM: Up to 6 Kbytes
Auto wakeup timer
Window watchdog and independent watchdog
Communications interfaces
Clock, reset and supply management
2.95 to 5.5 V operating voltage
Flexible clock control, 4 master clock sources:
– Low power crystal resonator oscillator
– External clock input
– Internal, user-trimmable 16 MHz RC
– Internal low power 128 kHz RC
Clock security system with clock monitor
Power management:
– Low power modes (Wait, Active-halt, Halt)
– Switch-off peripheral clocks individually
Permanently active, low consumption power-
on and power-down reset
High speed 1 Mbit/s active CAN 2.0B interface
UART with clock output for synchronous
operation - LIN master mode
UART with LIN 2.1 compliant, master/slave
modes and automatic resynchronization
SPI interface up to 10 Mbit/s
I
2
C interface up to 400 Kbit/s
10-bit ADC with up to 16 channels
Analog to digital converter (ADC)
I/Os
Up to 68 I/Os on an 80-pin package including
18 high sink outputs
Highly robust I/O design, immune against
current injection
Development support
– Single Wire Interface Module (SWIM) and
Debug Module (DM) for fast on-chip
programming and non-intrusive debugging
Table 1.
Device summary
Reference
Part number
STM8S207MB, STM8S207RB,
STM8S207R8, STM8S207R6,
STM8S207CB, STM8S207C6,
STM8S207C8, STM8S207S6,
STM8S207S8, STM8S207K6
STM8S208MB, STM8S208RB
Interrupt management
Nested interrupt controller with 32 interrupts
Up to 37 external interrupts on 6 vectors
Timers
2x 16-bit general purpose timers, with 2+3
CAPCOM channels (IC, OC or PWM)
Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-time
insertion and flexible synchronization
8-bit basic timer with 8-bit prescaler
STM8S207xx
STM8S208xx
January 2009
Rev 7
1/96
www.st.com
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