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MN101DF07ZAL

Description
Microcontroller, 8-Bit, FLASH, 14.32MHz, CMOS, PQFP112, 20 X 20 MM, LEAD FREE, PLASTIC, LQFP-112
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size119KB,5 Pages
ManufacturerPanasonic
Websitehttp://www.panasonic.co.jp/semicon/e-index.html
Environmental Compliance  
Download Datasheet Parametric View All

MN101DF07ZAL Overview

Microcontroller, 8-Bit, FLASH, 14.32MHz, CMOS, PQFP112, 20 X 20 MM, LEAD FREE, PLASTIC, LQFP-112

MN101DF07ZAL Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeQFP
package instruction20 X 20 MM, LEAD FREE, PLASTIC, LQFP-112
Contacts112
Reach Compliance Codeunknown
Has ADCYES
Other featuresALSO OPERATES AT 2.5V MINIMUM SUPPLY
Address bus width
bit size8
maximum clock frequency14.32 MHz
DAC channelNO
DMA channelNO
External data bus width
JESD-30 codeS-PQFP-G112
length20 mm
Number of I/O lines87
Number of terminals112
PWM channelYES
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
ROM programmabilityFLASH
Maximum seat height1.7 mm
speed14.32 MHz
Maximum supply voltage5.5 V
Minimum supply voltage3 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width20 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER
Base Number Matches1
MN101D07G,MN101D07H
Type
ROM (× 8-bit)
×
RAM (× 8-bit)
×
Package
Minimum Instruction
Execution Time
Interrupts
With main clock operated
When sub-clock operated
MN101D07G
128 K
4K
LQFP112-P-2020
*Lead-free
0.1397
µs
(at 4.0 V to 5.5 V, 14.32 MHz)
71.5
µs
(at 3.0 V to 5.5 V fixed to 14.32 MHz internal frequency division)
61
µs
(at 2.2 V to 5.5 V, 32.768 kHz)
MN101D07H
160 K
5K
• RESET • Runaway • External 0 • External 1 • External 2 • External 3 • External 4 • key input (P50 to 54)
• Timer 0 • Timer 1 • Timer 2 • Timer 3 • Timer 4 • Timer 6 • Timer 7 • Capstan FG • Control • HSW
• Cylinder(Drum) FG • Servo V-sync • Synchronous output • OSD • XDS • Serial 0 • Serial 1 • Serial 2
• A/D (common with PWM 4 reference frequency) • OSD V-sync
Timer counter 0: 16-bit
×
1
(timer function, clock function [max. 2 s or max. 36 h at cascade-connecting with timer 6])
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; overflow of timer counter 6;
1/512 of XI oscillation clock or OSC oscillation clock frequency
Interrupt source ················· overflow of timer counter 0
Timer counter 1: 16-bit
×
1 (timer function, linear timer counter function)
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; CTL signal
Interrupt source ················· overflow of timer counter 1
Timer counter 2: 16-bit
×
1 (timer function, input capture (DCTL specified edge), duty judgment of DCTL signal)
Clock source ····················· 1/2, (1/4,) 1/8, (1/16,) 1/12, (1/24) of system clock frequency
Interrupt source ················· overflow of timer counter 2; input of DCTL specified edge; underflow of timer 2
shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift
register compare register
Timer counter 3: 16-bit
×
1
(timer function, detection of serial indexing, generation of remote control output carrier frequency)
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; XI oscillation clock
Interrupt source ················· overflow of timer counter 3
Timer counter 4: 16-bit
×
1 (timer function, event count [P15 input], generation of serial transmission clock)
Clock source ····················· 1/8, (1/16) of system clock frequency; external clock input
Interrupt source ················· overflow of timer counter 4; coincidence of timer counter 4 with OCR4
Timer counter 5: 19-bit
×
1 (watchdog, stable oscillation waiting function)
Clock source ····················· system clock
Watchdog interrupt source ··· 1/2
16
, 1/2
19
of timer counter 5 frequency
Clear by stable oscillation ··· after 256 counts by timer counter 5 (2
18
counts of OSC oscillation clock)
Timer counter 6: 16-bit
×
1 (clock function [max. 2 s])
Clock source ····················· 1/512 of OSC oscillation clock frequency; XI oscillation clock;
1/4, (1/8,) 1/64, (1/128) of system clock frequency
Interrupt source ················· 1/2
13
, 1/2
14
, 1/2
15
overflow of timer counter 6
Timer counter 7: 8-bit
×
1 or 4-bit
×
2 (timer function, event count)
Clock source ····················· 1/4, (1/8,) 1/16, (1/32) of system clock frequency; external clock input
Interrupt source ················· overflow of timer counter 7 (although when 4-bit
×
2, there is one interrupt vector. )
Timer Counter
Serial Interface
Serial 0: 8-bit
×
1 (synchronous type/start-stop synchronous type) (transfer direction of MSB/LSB selectable)
Synchronous type clock source ··· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency;
2-division timer 4 output; NSBT0 pin input
Clock for UART ················ 8-division of above clock; 2-division timer 4 output; NSBT0 pin input
MAD00030FEM

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