MN101D07G,MN101D07H
Type
ROM (× 8-bit)
×
RAM (× 8-bit)
×
Package
Minimum Instruction
Execution Time
Interrupts
With main clock operated
When sub-clock operated
MN101D07G
128 K
4K
LQFP112-P-2020
*Lead-free
0.1397
µs
(at 4.0 V to 5.5 V, 14.32 MHz)
71.5
µs
(at 3.0 V to 5.5 V fixed to 14.32 MHz internal frequency division)
61
µs
(at 2.2 V to 5.5 V, 32.768 kHz)
MN101D07H
160 K
5K
• RESET • Runaway • External 0 • External 1 • External 2 • External 3 • External 4 • key input (P50 to 54)
• Timer 0 • Timer 1 • Timer 2 • Timer 3 • Timer 4 • Timer 6 • Timer 7 • Capstan FG • Control • HSW
• Cylinder(Drum) FG • Servo V-sync • Synchronous output • OSD • XDS • Serial 0 • Serial 1 • Serial 2
• A/D (common with PWM 4 reference frequency) • OSD V-sync
Timer counter 0: 16-bit
×
1
(timer function, clock function [max. 2 s or max. 36 h at cascade-connecting with timer 6])
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; overflow of timer counter 6;
1/512 of XI oscillation clock or OSC oscillation clock frequency
Interrupt source ················· overflow of timer counter 0
Timer counter 1: 16-bit
×
1 (timer function, linear timer counter function)
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; CTL signal
Interrupt source ················· overflow of timer counter 1
Timer counter 2: 16-bit
×
1 (timer function, input capture (DCTL specified edge), duty judgment of DCTL signal)
Clock source ····················· 1/2, (1/4,) 1/8, (1/16,) 1/12, (1/24) of system clock frequency
Interrupt source ················· overflow of timer counter 2; input of DCTL specified edge; underflow of timer 2
shift register 4-bit counter; coincidence of timer 2 shift register with timer 2 shift
register compare register
Timer counter 3: 16-bit
×
1
(timer function, detection of serial indexing, generation of remote control output carrier frequency)
Clock source ····················· 1/2, (1/4,) 1/8, (1/16) of system clock frequency; XI oscillation clock
Interrupt source ················· overflow of timer counter 3
Timer counter 4: 16-bit
×
1 (timer function, event count [P15 input], generation of serial transmission clock)
Clock source ····················· 1/8, (1/16) of system clock frequency; external clock input
Interrupt source ················· overflow of timer counter 4; coincidence of timer counter 4 with OCR4
Timer counter 5: 19-bit
×
1 (watchdog, stable oscillation waiting function)
Clock source ····················· system clock
Watchdog interrupt source ··· 1/2
16
, 1/2
19
of timer counter 5 frequency
Clear by stable oscillation ··· after 256 counts by timer counter 5 (2
18
counts of OSC oscillation clock)
Timer counter 6: 16-bit
×
1 (clock function [max. 2 s])
Clock source ····················· 1/512 of OSC oscillation clock frequency; XI oscillation clock;
1/4, (1/8,) 1/64, (1/128) of system clock frequency
Interrupt source ················· 1/2
13
, 1/2
14
, 1/2
15
overflow of timer counter 6
Timer counter 7: 8-bit
×
1 or 4-bit
×
2 (timer function, event count)
Clock source ····················· 1/4, (1/8,) 1/16, (1/32) of system clock frequency; external clock input
Interrupt source ················· overflow of timer counter 7 (although when 4-bit
×
2, there is one interrupt vector. )
Timer Counter
Serial Interface
Serial 0: 8-bit
×
1 (synchronous type/start-stop synchronous type) (transfer direction of MSB/LSB selectable)
Synchronous type clock source ··· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency;
2-division timer 4 output; NSBT0 pin input
Clock for UART ················ 8-division of above clock; 2-division timer 4 output; NSBT0 pin input
MAD00030FEM
MN101D07G,MN101D07H
Serial Interface (Continue)
Serial 1: 8-bit
×
1
(synchronous type/remote control transmission/simple remote control receive) (transfer direction of MSB/LSB
selectable, start condition function)
Clock source ····················· 1/8, 1/16, 1/32, 1/64, 1/128, 1/256 of system clock frequency;
2-division timer 4 output; NSBT1 pin input
Remote control clock ······· 2-division timer 4 output
Serial 2: 8-bit
×
1 (I
2
C) (master transmission/reception, slave transmission/reception)
Clock source ····················· 1/144 to 1/252 of system clock, SCK pin input
OSD
OSD mode: Accommodation with menu(internal synchronous) or super impose(external synchronous) display
Applicable broadcasting system : NTSC, PAL, PAL-M, PAL-N
Screen configuration
: 24 characters
×
2n rows (n = 1 to 6)
Character type
: max. 512 character types (variable)
Character size
: 12
×
18 dots
Enlarged characters
: each
×
2,
×
3 or
×
4 settings in horizontal and vertical
Character interpolation
: none
Line background color
: 8-hue settable (settable in the row unit at menu display)
Line background intensity
: 8 gradations settable in the row unit(at output of composite video signal)
Screen background color
: 8-hue settable (at output of composite video signal)
Character color
: white (at output of composite video signal)
Character intensity
: 8 gradations settable in the row unit
Frame function
: 1-dot frame in 4 or 8 directions (at output of composite video signal)
Frame intensity
: 4 gradations settable in the row unit
Box shade function
: settable in the character unit (at output of composite video signal with
129 or more characters (character types))
Blinking
: none (covered by software)
Inverted character
: settable in the character unit
Halftone
: settable in the row unit in 2 intensity gradations (at output of external
synchronous composite video signal)
CCD mode:Supports Closed Caption in the U.S.A.
Screen configuration
: 32 characters
×
16 rows
Character type
: max. 128 character types (variable)
Character size
: 12
×
26 dots (including 8 dots in the underlined area)
Enlarged characters
: none
Character interpolation
: none
Line background color
: 8-hue settable
Line background intensity
: 8 gradations settable in the screen unit (at output of composite video signal)
Screen background color
: 8-hue settable (at output of composite video signal)
Character color
: 8 colors (at RGB output)
: White (at output of composite video signal)
Character intensity
: 8 gradations settable in the screen unit(at output of composite video signal)
Frame function
: none
Box shade function
: none
Inverted character
: none
Halftone
: settable in the row unit in 2 intensity gradations
(at output of external synchronous composite video signal)
Others
: Underline, italic, blinking function and scroll
Input
: composite video signal input (output level: 1 V[p-p] / 2 V[p-p])
Clamp method
: sync tip clamp, clamp level in 4 levels
Output
: composite video output
: output of Y/C split video signal
: digital output (6 pins)
Measure against image fluctuation : built-in AFC circuit
Dot clock
: 1/2 of OSC oscillation clock (automatic phase adjustment)
See the next page for electrical characteristics, pin assignment and support tool.
MAD00030FEM
XDS
ROM Correction
I/O Pins
A/D Inputs
PWM
I/O
Input
Built-in U.S. closed caption data slicer (optional 2 line data can be extracted.)
Correcting address designation: up to 3 addresses possible
Correction method: correction program being saved in internal RAM
85
2
• Common use: 71
• Common use: 2
8-bit
×
14-ch. (without S/H)
13-bit
×
2-ch. (at repetition cycle 572
µs
at 14.32 MHz),
10-bit
×
2-ch. (at repetition cycle 71.5
µs
at 14.32 MHz),
8-bit
×
1-ch. (at repetition cycle 71.5
µs,
0.572 ms, 1.14 ms, 2.29 ms at 14.32 MHz)
18-bit
×
6-ch.
16-bit
×
2 (8-bit synchronous output; 4-bit 3-state synchronous output),
16-bit
×
1 (weak electric field V-sync backup), 16-bit
×
1 (Rec CTL)
Buzzer output; 3-state output VLP pin; remote control receive;
CTL signal input terminal; Capstan FG inputterminal; Sylinder(Durm) PG/FG input terminals;
HSW output terminal; Head Amp/Rortary control output terminals;
output of 1/2 OSC oscillation clock (2 V[p-p]); output of 1/4 OSC oscillation clock (1 V[p-p])
ICR
OCR
Special Ports
Electrical Characteristics
Supply current
Limit
Parameter
Symbol
IDD1
IDD2
Operating supply current
Stop of 14.32 MHz oscillation, VDD = 2.7 V
IDD3
32 kHz oscillation operation without load
Supply current at STOP
IDSP
IDHT0
Supply current at HALT
IDHT1
32 kHz oscillation operation without load
Stop of oscillation without load, VDD = 5 V, Ta = 55
°C
14.32 MHz oscillation without load, VDD = 5 V
Stop of 14.32 MHz oscillation, VDD = 2.7 V
5
20
5
20
15
50
100
µA
µA
mA
µA
Condition
min
14.32 MHz operation without load, VDD = 5 V
1/1024 of 14.32 MHz operation without load, VDD = 3.0 V
typ
60
2
max
100
5
mA
mA
Unit
(Ta = 25
°C ±
2
°C
, VSS = 0 V)
A/D Converter Performance
Limit
Parameter
Conversion relative error
A/D Conversion Time
Analog Input Voltage
Symbol
∆NLAD
tAD
fosc = 14.32 MHz
8
5
Condition
min
typ
max
±
3
LSB
µs
V
Unit
(Ta = 25
°C ±
2
°C
,VSS = 0 V)
MAD00030FEM
MN101D07G,MN101D07H
Pin Assignment
RCTLN
RCTLP
AV
DD
CTLA
AV
SS
VRI
VRO
AFG
FGF
YPG(↔P91)
YFG(PFG)
PGMM(↔P92)
VOW1(↔PA0)
VOW2(↔PA1)
VOW3(↔PA2)
VOW4(↔PA3)
VOB1(↔PA4)
VOB2(↔PA5)
PA6
SCOUT(↔P93)
SECAM(↔PA7)
SYOUT(↔P94)
FSCLPF(↔PB0)
FSCI(↔PB1)
AFCLPG(↔PB2)
AFCC(↔PB3)
V
DD2
SCIN(↔P95)
CO
TPZ(↔P90/AD12)
AD13(↔PC4)
AD11(↔PC3)
AD10(↔PC2)
AD9(↔PC1)
AD8(↔PC0)
AD7(↔P87)
AD6(↔P86)
AD5(↔P85)
AD4(↔P84)
AD3(↔P83)
AD2(↔P82)
AD1(↔P81)
AD0(↔P80)
V
DD
P77
P76
P75
P74
P73
P72
P71
P70
V
SS
ROTA(↔P67)
HAMP(↔P66)
DENV(↔P65)
84
86
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
MN101D07G
MN101D07H
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
SYIN(P96↔)
CVIN2(PB4↔)
CVIN(PB5↔)
V
SS2
CVOUT(PB6↔)
P97
HSYNC(PB7↔)
VSYNC(P20↔)
OSCO2(P21↔)
OSCI2(P22↔)
SXI
XO(P23↔)
XI(P24↔)
V
SS
OSCI
OSCO
V
DD
SBUFD0/PWM4(P25↔)
PWM0
PWM1
P57
SBUFD1(P11/PWM2↔)
SBUFD2(P12/PWM3↔)
SBUFD3(P13/FF15↔)
SBUFD4(P14/TC3O↔)
SBUFD5(P15/TC4I↔)
SBUFD6(XDSCK/OSDH/P16↔)
SBUFD7(XDSDAT/OSDV/OSCDIV/P17←)
Support Tool
In-circuit Emulator
Flash Memory Built-in Type
PX-ICE101C / D + PX-PRB101D07-LQFP112-P-2020-M
Type
ROM (× 8-bit)
RAM (× 8-bit)
Minimum instruction execution time
MN101DF07ZAL
224 K
6K
0.1397
µs
(at 4.0 V to 5.5 V, 14.32 MHz)
71.5
µs
(at 3.0 V to 5.5 V, fixed to 14.32 MHz internal division)
61
µs
(at 2.5 V to 5.5 V, 32.768 kHz)
Package
LQFP112-P-2020
*Lead-free
MAD00030FEM
IRQ0(P64→)
IRQ1(P63↔)
IRQ2(P62↔)
IRQ3(P61↔)
IRQ4(P60↔)
P56
P55
KEYIRQ4(P54↔)
KEYIRQ3(P53↔)
KEYIRQ2(P52↔)
KEYIRQ1(P51↔)
KEYIRQ0(P50↔)
SBT1(P07↔)
SBI1(P06↔)
SBO1(P05↔)
P03
SBT0(P02↔)
SBI0(P01↔)
SBO0(P00↔)
SDA(P27↔)
SCK(P26↔)
HBUFD6/BUZZER(P46↔)
HUBFD4(P44↔)
HUBFD2/DAOUT(P42↔)
HUBFD0(P40↔)
HSW
VLP
NRST(P04←)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
LQFP112-P-2020
*
Lead-free
Request for your special attention and precautions in using the technical information
and semiconductors described in this material
(1) An export permit needs to be obtained from the competent authorities of the Japanese Government if any of
the products or technical information described in this material and controlled under the "Foreign Exchange
and Foreign Trade Law" is to be exported or taken out of Japan.
(2) The technical information described in this material is limited to showing representative characteristics and
applied circuits examples of the products. It neither warrants non-infringement of intellectual property right
or any other rights owned by our company or a third party, nor grants any license.
(3) We are not liable for the infringement of rights owned by a third party arising out of the use of the technical
information as described in this material.
(4) The products described in this material are intended to be used for standard applications or general elec-
tronic equipment (such as office equipment, communications equipment, measuring instruments and house-
hold appliances).
Consult our sales staff in advance for information on the following applications:
•
Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combus-
tion equipment, life support systems and safety devices) in which exceptional quality and reliability are
required, or if the failure or malfunction of the products may directly jeopardize life or harm the human
body.
•
Any applications other than the standard applications intended.
(5) The products and product specifications described in this material are subject to change without notice for
modification and/or improvement. At the final stage of your design, purchasing, or use of the products,
therefore, ask for the most up-to-date Product Standards in advance to make sure that the latest specifica-
tions satisfy your requirements.
(6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rat-
ing, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not
be liable for any defect which may arise later in your equipment.
Even when the products are used within the guaranteed values, take into the consideration of incidence of
break down and failure mode, possible to occur to semiconductor products. Measures on the systems such
as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent
physical injury, fire, social damages, for example, by using the products.
(7) When using products for which damp-proof packing is required, observe the conditions (including shelf life
and amount of time let standing of unsealed items) agreed upon when specification sheets are individually
exchanged.
(8) This material may be not reprinted or reproduced whether wholly or partially, without the prior written
permission of Matsushita Electric Industrial Co., Ltd.
2003 SEP