DATA SHEET
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUITS
µ
PC2711TB,
µ
PC2712TB
5 V, SUPER MINIMOLD SILICON MMIC
WIDEBAND AMPLIFIER
DESCRIPTION
The
µ
PC2711TB and
µ
PC2712TB are silicon monolithic integrated circuits designed as buffer amplifier for DBS
tuners. These ICs are packaged in super minimold package which is smaller than conventional minimold.
The
µ
PC2711TB
and
µ
PC2712TB
have
each
compatible
pin
connections
and
performance
to
µ
PC2711T/
µ
PC2712T of conventional minimold version.
So, in the case of reducing your system size,
µ
PC2711TB/
µ
PC2712TB are suitable to replace from
µ
PC2711T/
µ
PC2712T.
These ICs are manufactured using NEC’s 20 GHz f
T
NESAT™III silicon bipolar process. This process uses silicon
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and
prevent corrosion/migration. Thus, these IC have excellent performance, uniformity and reliability.
FEATURES
•
•
•
High-density surface mounting : 6-pin super minimold package (2.0
×
1.25
×
0.9 mm)
Supply voltage
Wideband response
Power gain variation
: V
CC
= 4.5 to 5.5 V
: f
u
= 2.9 GHz TYP. @
µ
PC2711TB
f
u
= 2.6 GHz TYP. @
µ
PC2712TB
: G
P
= 13 dB TYP. @
µ
PC2711TB
G
P
= 20 dB TYP. @
µ
PC2712TB
•
APPLICATIONS
•
•
Local buffer in DBS tuners, etc.
:
µ
PC2711TB
RF stage buffer in DBS tuners, etc. :
µ
PC2712TB
ORDERING INFORMATION
Part Number
Package
6-pin super minimold
Marking
C1G
C1H
Supplying Form
Embossed tape 8 mm wide.
1, 2, 3 pins face the perforation side of the tape.
Qty 3 kpcs/reel.
µ
PC2711TB-E3
µ
PC2712TB-E3
Remark
To order evaluation samples, please contact your local NEC sales office (Part number for sample
order:
µ
PC2711TB,
µ
PC2712TB).
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P11510EJ3V0DS00 (3rd edition)
Date Published November 2000 N CP(K)
Printed in Japan
The mark
shows major revised points.
©
1996, 2000
µ
PC2711TB,
µ
PC2712TB
PIN CONNECTIONS
(Top View)
(Bottom View)
4
5
6
4
5
6
3
2
1
Pin No.
1
2
3
4
Pin Name
INPUT
GND
GND
OUTPUT
GND
V
CC
3
2
1
C1G
Marking is an example of
µ
PC2711TB
5
6
PRODUCT LINE-UP OF 5V-BIAS SILICON MMIC WIDEBAND AMPLIFIERS
(T
A
= +25°C, V
CC
= 5.0 V, Z
S
= Z
L
= 50
Ω
)
°
Part No.
f
u
(GHz)
2.9
P
O(sat)
(dBm)
+1
G
P
(dB)
13
NF (dB)
5.0
I
CC
(mA)
12
Package
6-pin minimold
6-pin super minimold
2.6
+3
20
4.5
12
6-pin minimold
6-pin super minimold
1.2
+7.0
29
3.2
@f = 0.5 GHz
5.5
@f = 0.5 GHz
3.5
@f = 0.5 GHz
2.3
@f = 1.5 GHz
12
6-pin minimold
C1J
C1H
Marking
C1G
µ
PC2711T
µ
PC2711TB
µ
PC2712T
µ
PC2712TB
µ
PC2713T
µ
PC2791TB
µ
PC2792TB
µ
PC3215TB
1.9
+4.0
12
17
6-pin super minimold
C2S
1.2
+5.0
20
19
C2T
2.9
+3.5
20.5
14
C3H
Remark
Caution
Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
The package size distinguish between minimold and super minimold.
2
Data Sheet P11510EJ3V0DS00
µ
PC2711TB,
µ
PC2712TB
SYSTEM APPLICATION EXAMPLE
RF unit block of DBS tuners
1st IF input from
DBS converter
BPF
Mixer
SAW
AGC Amp.
FM Demod.
Baseband
output
µ
PC2712TB
µ
PC2711TB
µ
PC2711TB
Prescaler
PLL Synth.
OSC
LPF
PIN EXPLANATIONS
Applied
Voltage
(V)
Pin
Voltage
Note
(V)
1.00
Pin
No.
1
Pin Name
Function and Applications
Internal Equivalent Circuit
INPUT
0.97
Signal input pin. A internal matching circuit,
configured with resistors, enables 50
Ω
connection over a wide band. A multi-
feedback circuit is designed to cancel the
deviations of h
FE
and resistance. This pin
must be coupled to signal source with
capacitor for DC cut.
Signal output pin. A internal matching circuit,
configured with resistors, enables 50
Ω
connection over a wide band. This pin must
be coupled to next stage with capacitor for DC
cut.
Power supply pin. This pin should be
externally equipped with bypass capacitor to
minimize ground impedance.
Ground pin. This pin should be connected to
system ground with minimum inductance.
Ground pattern on the board should be formed
as wide as possible. All the ground pins must
be connected together with wide ground
pattern to decrease impedance difference.
6
4
4
OUTPUT
4.40
1
4.12
6
V
CC
4.5 to 5.5
2
3
5
GND
0
2
3
5
Note
Pin voltage is measured at V
CC
= 5.0 V, Above:
µ
PC2711TB, Below:
µ
PC2712TB
Data Sheet P11510EJ3V0DS00
3
µ
PC2711TB,
µ
PC2712TB
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Total Circuit Current
Power Dissipation
Symbol
V
CC
I
CC
P
D
T
A
= +25°C
T
A
= +25°C
Mounted on double sided copper clad
50
×
50
×
1.6 mm epoxy glass PWB (T
A
= +85°C)
Conditions
Ratings
6
30
270
−40
to +85
−55
to +150
T
A
= +25°C
+10
Unit
V
mA
mW
°C
°C
dBm
Operating Ambient
Temperature
Storage Temperature
Input Power
T
A
T
stg
P
in
RECOMMENDED OPERATING RANGE
Parameter
Supply Voltage
Operating Ambient
Temperature
Symbol
V
CC
T
A
MIN.
4.5
−40
TYP.
5.0
+25
MAX.
5.5
+85
Unit
V
°C
ELECTRICAL CHARACTERISTICS (T
A
= +25°C, V
CC
= 5.0 V, Z
S
= Z
L
= 50
Ω
)
°
µ
PC2711TB
Parameter
Circuit Current
Power Gain
Saturated Output Power
Symbol
I
CC
G
P
P
O(sat)
Test Conditions
MIN.
No signal
f = 1 GHz
f = 1 GHz,
P
in
= 0 dBm
f = 1 GHz
3 dB down below from
gain at f = 0.1 GHz
f = 1 GHz
f = 1 GHz
f = 1 GHz
f = 0.1 to 2.5 GHz
@
µ
PC2711TB
f = 0.1 to 2.0 GHz
@
µ
PC2712TB
9
11
−2
2.7
TYP.
12
13
+1
MAX.
15
16.5
MIN.
9
18
0
2.2
TYP.
12
20
+3
MAX.
15
23.5
mA
dB
dBm
µ
PC2712TB
Unit
Noise Figure
Upper Limit Operating
Frequency
Isolation
Input Return Loss
Output Return Loss
Gain Flatness
NF
f
u
5
2.9
6.5
4.5
2.6
6
dB
GHz
ISL
RL
in
RL
out
∆G
P
25
20
9
30
25
12
±0.8
28
9
10
33
12
13
±0.8
dB
dB
dB
dB
4
Data Sheet P11510EJ3V0DS00
µ
PC2711TB,
µ
PC2712TB
TEST CIRCUIT
V
CC
1 000 pF
C
3
6
50
Ω
IN
1 000 pF
C
1
1
4
C
2
1 000 pF
50
Ω
OUT
2, 3, 5
EXAMPLE OF APPLICATION CIRCUIT
V
CC
1 000 pF
C
3
6
50
Ω
IN
1 000 pF
C
1
1
4
C
4
1 000 pF
C
5
1 000 pF
R
1
50 to 200
Ω
2, 3, 5
To stabilize operation,
please connect R
1
, C
5
1
6
4
C
2
1 000 pF
50
Ω
OUT
1 000 pF
C
6
2, 3, 5
The application circuits and their parameters are for references only and are not intended for use in actual design-ins.
CAPACITORS FOR V
CC
, INPUT AND OUTPUT PINS
1 000 pF capacitors are recommendable as bypass capacitor for V
CC
pin and coupling capacitors for input/output
pins.
Bypass capacitor for V
CC
pin is intended to minimize V
CC
pin’s ground impedance. Therefore, stable bias can be
supplied against V
CC
fluctuation.
Coupling capacitors for input/output pins are intended to minimize RF serial impedance and cut DC.
To get flat gain from 100 MHz up, 1 000 pF capacitors are assembled on the test circuit. [Actually, 1 000 pF
capacitors give flat gain at least 10 MHz. In the case of under 10 MHz operation, increase the value of coupling
capacitor such as 2 200 pF. Because the coupling capacitors are determined by the equation of C = 1/(2
π
fZs).]
Data Sheet P11510EJ3V0DS00
5
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