74LCX16373MTDX datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> 74LCX16373MTDX

74LCX16373MTDX: DescriptionLVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48; Categorylogic logic; File Size127KB，10 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/; Environmental Compliance

Download Datasheet Parametric Compare View All

74LCX16373MTDX Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	74LCX16373MTDX	-	-	View	Buy Now

74LCX16373MTDX Overview

LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48

74LCX16373MTDX Parametric

Parameter Name	Attribute value
Brand Name	Fairchild Semiconductor
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Fairchild
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP48,.3,20
Contacts	48
Manufacturer packaging code	48 LD,TSSOP,JEDEC MO-153, 6.1MM WIDE
Reach Compliance Code	compliant
ECCN code	EAR99
Samacsys Description	74LCX16373MTDX, Latch Transparent D Type 16-Bit 3 State 2 → 3.6 V 48-Pin TSSOP
series	LVC/LCX/Z
JESD-30 code	R-PDSO-G48
JESD-609 code	e4
length	12.5 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.024 A
Humidity sensitivity level	2
Number of digits	8
Number of functions	2
Number of ports	2
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP48,.3,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Prop。Delay @ Nom-Sup	5.4 ns
propagation delay (tpd)	6.6 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6.1 mm
Base Number Matches	1

Preview

Download Datasheet

View All

74LCX16373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs

February 1994

Revised May 2005

74LCX16373

Low Voltage 16-Bit Transparent Latch

with 5V Tolerant Inputs and Outputs

General Description

The LCX16373 contains sixteen non-inverting latches with

3-STATE outputs and is intended for bus oriented applica-

tions. The device is byte controlled. The flip-flops appear

transparent to the data when the Latch Enable (LE) is

HIGH. When LE is LOW, the data that meets the setup time

is latched. Data appears on the bus when the Output

Enable (OE) is LOW. When OE is HIGH, the outputs are in

a high impedance state.

The LCX16373 is designed for low voltage (2.5V or 3.3V)

applications with capability of interfacing to a 5V signal

environment.

The LCX16373 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

5V tolerant inputs and outputs

2.3V–3.6V V

specifications provided

5.4 ns t

max (V

3.3V), 20

A I

max

Power down high impedance inputs and outputs

Supports live insertion/withdrawal (Note 1)

24 mA output drive (V

3.0V)

Uses patented noise/EMI reduction circuitry

Latch-up performance exceeds 500 mA

ESD performance:

Human body model

2000V

Machine model

200V

Also packaged in plastic Fine-Pitch Ball Grid Array

(FBGA)

Note 1:

To ensure the high-impedance state during power up or down, OE

should be tied to V

through a pull-up resistor: the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Order Number

74LCX16373G

(Note 2)(Note 3)

74LCX16373MEA

(Note 3)

74LCX16373MTD

(Note 3)

Package Number

BGA54A

MS48A

MTD48

Package Description

54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Note 2:

Ordering code “G” indicates Trays.

Note 3:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

DS012002

www.fairchildsemi.com

74LCX16373MTDX Related Products

	74LCX16373MTDX	74LCX16373	74LCX16373MTD
Description	LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48	8-Bit D-Type Latch	LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48
Brand Name	Fairchild Semiconductor	-	Fairchild Semiconductor
Is it lead-free?	Lead free	-	Lead free
Is it Rohs certified?	conform to	-	conform to
Maker	Fairchild	-	Fairchild
Parts packaging code	TSSOP	-	TSSOP
package instruction	TSSOP, TSSOP48,.3,20	-	TSSOP, TSSOP48,.3,20
Contacts	48	-	48
Manufacturer packaging code	48 LD,TSSOP,JEDEC MO-153, 6.1MM WIDE	-	48 LD,TSSOP,JEDEC MO-153, 6.1MM WIDE
Reach Compliance Code	compliant	-	compliant
ECCN code	EAR99	-	EAR99
Samacsys Description	74LCX16373MTDX, Latch Transparent D Type 16-Bit 3 State 2 → 3.6 V 48-Pin TSSOP	-	Fairchild Semiconductor 74LCX16373MTD, 16 Bit Latch, Transparent D Type, 16-Bit, 3 State, 2 → 3.6 V, 48-Pin TSSOP
series	LVC/LCX/Z	-	LVC/LCX/Z
JESD-30 code	R-PDSO-G48	-	R-PDSO-G48
JESD-609 code	e4	-	e4
length	12.5 mm	-	12.5 mm
Load capacitance (CL)	50 pF	-	50 pF
Logic integrated circuit type	BUS DRIVER	-	BUS DRIVER
MaximumI(ol)	0.024 A	-	0.024 A
Humidity sensitivity level	2	-	2
Number of digits	8	-	8
Number of functions	2	-	2
Number of ports	2	-	2
Number of terminals	48	-	48
Maximum operating temperature	85 °C	-	85 °C
Minimum operating temperature	-40 °C	-	-40 °C
Output characteristics	3-STATE	-	3-STATE
Output polarity	TRUE	-	TRUE
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY
encapsulated code	TSSOP	-	TSSOP
Encapsulate equivalent code	TSSOP48,.3,20	-	TSSOP48,.3,20
Package shape	RECTANGULAR	-	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TAPE AND REEL	-	RAIL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED
power supply	3.3 V	-	3.3 V
Prop。Delay @ Nom-Sup	5.4 ns	-	5.4 ns
propagation delay (tpd)	6.6 ns	-	6.6 ns
Certification status	Not Qualified	-	Not Qualified
Maximum seat height	1.2 mm	-	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	-	3.6 V
Minimum supply voltage (Vsup)	2 V	-	2 V
Nominal supply voltage (Vsup)	2.5 V	-	2.5 V
surface mount	YES	-	YES
technology	CMOS	-	CMOS
Temperature level	INDUSTRIAL	-	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	-	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	-	GULL WING
Terminal pitch	0.5 mm	-	0.5 mm
Terminal location	DUAL	-	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED
width	6.1 mm	-	6.1 mm
Base Number Matches	1	-	1

Recommended Resources

This application circuit of LM135-235-335b

Alarm circuit for induction cooker

MAX705, 706, and 813L constitute a single-chip microcomputer monitoring circuit

555 three-state sound and light logic pen circuit

doorbell circuit

Simple RC clock

I work in the field of industrial control, electronics and hardware are both possible: Are there many people in the industrial control field on this site?...; chuxiang Industrial Control Electronics

Requesting Jlink script for ARM-A9: I recently wanted to use Jlink to connect to S5P4418 and play bare metal programming, but I found that Jlink could not connect to the CPU, as shown in the figure. I asked netizens to help me write a J...; 瓜弟 ARM Technology

C5517 FFT hardware accelerator performs calculations sometimes well and sometimes poorly: [align=left][color=rgb(85, 85, 85)][font="][size=4]Using the hardware accelerator to calculate 128-point fft, the data was wrong at the beginning. After many attempts, it was finally successful under ...; 灞波儿奔 DSP and ARM Processors

Antenna Aperture Tuning eBook: [i=s]This post was last edited by alan000345 on 2019-5-7 11:11[/i] Higher data rates, more antennas, less space. Antenna efficiency plays a critical role in the overall RF performance of smartphones. ...; alan000345 RF/Wirelessly

FRAM Reliability Explanation: FRAM Reliability ExplanationFRAM How-to and Best Practices FRAM Reliability Explanation...; Jacktang Microcontroller MCU

Burn dtb file separately: A: I would like to ask, is there any tool or method to burn dtb files separately? B: The OS option of the burning tool has a choice KERN-Nand Uboot and dtb are updated together...; 明远智睿Lan Industrial Control Electronics

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components