SS2FLDL-TTL-18F datasheet, PDF

SS2FLDL-TTL-18F: DescriptionActive Delay Line, 2-Func, 1-Tap, True Output, TTL, THRU-HOLE, MODULE-8/6; Categorylogic logic; File Size504KB，1 Pages; ManufacturerEngineered Components Co.

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SS2FLDL-TTL-18F Overview

Active Delay Line, 2-Func, 1-Tap, True Output, TTL, THRU-HOLE, MODULE-8/6

Parameter Name	Attribute value
Maker	Engineered Components Co.
Parts packaging code	DIP
package instruction	QIP,
Contacts	6
Reach Compliance Code	unknown
Is Samacsys	N
Other features	TYP. ICC = 60MA; MAX FAN OUT OF 10 STTL LOAD PER OUTPUT; INTERNAL TERMINATION
series	F
JESD-30 code	R-XDIP-P6
length	12.7 mm
Logic integrated circuit type	ACTIVE DELAY LINE
Number of functions	2
Number of taps/steps	1
Number of terminals	6
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	UNSPECIFIED
encapsulated code	QIP
Package shape	RECTANGULAR
Package form	IN-LINE
programmable delay line	NO
Certification status	Not Qualified
Maximum seat height	7.366 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	DUAL
Total delay nominal (td)	18 ns
width	6.35 mm
Base Number Matches	1

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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