L6401GF1346DL datasheet, PDF - EEWORLD Datasheet

L6401GF1346DL: DescriptionFixed Positive LDO Regulator, 2 Output, 1.3V1, 4.6V2, CMOS, PDSO6, USP-6; CategoryPower/power management The power supply circuit; File Size510KB，7 Pages; ManufacturerLRC; Websitehttp://www.lrc.cn

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L6401GF1346DL Overview

Fixed Positive LDO Regulator, 2 Output, 1.3V1, 4.6V2, CMOS, PDSO6, USP-6

Parameter Name	Attribute value
Maker	LRC
package instruction	USP-6
Reach Compliance Code	unknown
Maximum drop-back voltage 1	0.3 V
Maximum drop-back voltage 2	0.3 V
Maximum input voltage	8 V
Minimum input voltage	5.1 V
JESD-30 code	R-PDSO-N6
length	2 mm
Number of functions	1
Output times	2
Number of terminals	6
Maximum output voltage 1	1.326 V
Minimum output voltage 1	1.274 V
Nominal output voltage 1	1.3 V
Maximum output voltage 2	4.692 V
Minimum output voltage 2	4.508 V
Nominal output voltage 2	4.6 V
Package body material	PLASTIC/EPOXY
encapsulated code	HTSON
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE
Regulator type	FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
Maximum seat height	0.8 mm
surface mount	YES
technology	CMOS
Terminal form	NO LEAD
Terminal location	DUAL
width	1.8 mm
Base Number Matches	1

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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