a4919
Three-Phase MOSFET Driver
with Integrated Regulator
• High-current
3-phase gate drive for N-channel MOSFETs
• 5.5
to 50 V supply voltage range
• Regulated
logic supply voltage output option
• Low-current
Sleep mode option
• Motor
phase short-to-supply and short-to-ground detection
• Cross-conduction
protection
• Undervoltage,
overtemperature monitors
• Lawn
and garden equipment
• Battery-operated
power tools
• Industrial
grinders
• Continuous
positive airway pressure (CPAP) machines
• Vacuum
cleaners
Features anD BeneFits
The A4919 is a three-phase controller for use with N-channel
external power MOSFETs.
A unique charge pump regulator provides full (>10 V) gate drive
at power supply voltages down to 7 V and allows the A4919
to operate with reduced gate drive at power supply voltages
down to 5.5 V. A bootstrap capacitor is used to provide the
above power supply voltage required for N-channel MOSFETs.
One logic-level input is provided for each of the six power
MOSFETs in the 3-phase bridge, allowing motors to be driven
with any commutation scheme defined by an external controller.
The power MOSFETs are protected from cross-conduction by
integrated crossover control.
Motor phase short-to-supply and short-to-ground detection
is provided by independent drain-source voltage monitors on
each MOSFET. Short faults, supply undervoltage, and chip
overtemperature conditions are indicated by a single open-
drain fault output.
Product variants incorporating a low dropout (LDO) regulator to
source either 5.0 V or 3.3 V to external circuitry are available.
The A4919 is supplied in a 28-pin TSSOP power package with
exposed thermal pad (package type LP) and a 28-terminal
5 mm × 5 mm × 0.90 mm QFN package with exposed thermal
pad. Both packages are lead (Pb) free, with 100% matte-tin
leadframe plating (suffix T).
Description
applications
package:
28-pin TSSOP
with exposed thermal pad
(suffix LP)
28-terminal
5 mm × 5 mm QFN
with exposed thermal pad
(suffix ET)
Not to scale
typical application Diagram
V+
VDD
A4919
Micro-
controller
3-Phase
BLDC
Motor
A4919-DS, Rev. 4
MCO-0000329
January 16, 2018
A4919
Three-Phase MOSFET Driver
with Integrated Regulator
selection guiDe
part number
A4919GLPTR-T
A4919GLPTR-3-T
A4919GLPTR-5-T
A4919GETTR-T
A4919GETTR-3-T
A4919GETTR-5-T
sleep Mode
Yes
–
–
Yes
–
–
regulator
–
3.3 V
5V
–
3.3 V
5V
1500 pieces per 7-in. reel
4000 pieces per 13-in. reel
packing
package
9.7 mm × 4.4 mm, 1.2 mm nominal height
28-pin TSSOP with exposed thermal pad
5 mm × 5 mm, 0.9 mm nominal height
28-terminal QFN with exposed thermal pad
aBsolute MaxiMuM ratings
with respect to GND
characteristic
Load Supply Voltage
Logic Monitor or Supply
Terminal VREG
Terminals CP1, CP2
Logic Inputs AHI, ALO, BHI, BLO, CHI,
CLO
Terminal VBRG
Terminal LSS
Terminals SA, SB, SC
Terminals GHA, GHB, GHC
Terminals GLA, GLB, GLC
Terminals CA, CB, CC
Terminal FAULT
Terminal VDSTH
Ambient Operating Temperature
Range
Maximum Continuous Junction
Temperature
Transient Junction Temperature
Storage Temperature Range
T
A
T
J
(max)
T
tJ
T
stg
Overtemperature event not exceeding 10 seconds, lifetime
duration not exceeding 10 hours, determined by design
characterisation.
Limited by power dissipation
symbol
V
BB
V
DDM
, V
3
, V
5
V
DDM
if no internal LDO regulator, V
3
or V
5
if LDO regulator
present
notes
rating
–0.3 to 50
–0.3 to 7
–0.3 to 16
–0.3 to 16
–0.3 to 6.5
–5 to 55
–4 to 6.5
–5 to 55
S
x
to S
x
+15
–5 to 16
–0.3 to S
x
+ 15
–0.3 to 6.5
–0.3 to 6.5
–40 to 105
165
175
–55 to 150
unit
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
°C
°C
°C
therMal characteristics:
May require derating at maximum conditions; see application information
characteristic
Package Thermal Resistance
(Junction to Ambient)
Package Thermal Resistance
(Junction to Pad)
symbol
R
θJA
test conditions*
LP package, on 4-layer PCB based on JEDEC standard
LP package, on 2-layer PCB with 3.8 in
2
copper each side
ET package, on 4-layer PCB based on JEDEC standard
R
θJP
LP package
ET package
Value
28
32
32
2
2
unit
°C/W
°C/W
°C/W
°C/W
°C/W
*Additional thermal information available on the Allegro website.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4919
Three-Phase MOSFET Driver
with Integrated Regulator
table of contents
Specifications
Absolute Maximum Ratings
Thermal Characteristics
Pinout Diagram and Terminal Lists
Functional Block Diagram
Electrical Characteristics
Input and Output Terminal Functions
Power Supplies
CP1, CP2, VREG
Sleep Mode
Gate Drives
High-Side Gate Drives (GHA, GHB, GHC)
Bootstrap Charge Management
Low-side Gate Drive (GLA, GLB, GLC)
Drain Source Voltage Monitor
Logic Control Inputs
Diagnostics
Fault States
Low Dropout (LDO) Regulator
Power Bridge Management Using PWM Control
Bootstrap Capacitor Selection
Bootstrap Charging
VREG Capacitor Selection
LDO Regulator Capacitor Selection
Supply Decoupling
Input/Output Structures
Layout Recommendations
Package Outline Drawings
2
2
2
4
6
7
10
10
11
11
11
11
11
11
12
12
13
13
13
15
16
16
16
17
17
17
17
18
19
20
Functional Description
Applications Information
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A4919
Three-Phase MOSFET Driver
with Integrated Regulator
pinout DiagraMs anD terMinal list taBles
lp pinout Diagrams
LSS 1
GLC 2
GHC 3
SC 4
CC 5
GLB 6
GHB 7
SB 8
CB 9
GLA 10
GHA 11
SA 12
CA 13
VREG 14
PAD
28 CLO
27 CHI
26 BLO
25 BHI
24 ALO
23 AHI
22 FAULT
21 VDSTH
20 V3
19 GND
18 VBRG
17 VBB
16 CP1
15 CP2
LSS 1
GLC 2
GHC 3
SC 4
CC 5
GLB 6
GHB 7
SB 8
CB 9
GLA 10
GHA 11
SA 12
CA 13
VREG 14
PAD
28 CLO
27 CHI
26 BLO
25 BHI
24 ALO
23 AHI
22 FAULT
21 VDSTH
20 V5
19 GND
18 VBRG
17 VBB
16 CP1
15 CP2
LSS 1
GLC 2
GHC 3
SC 4
CC 5
GLB 6
GHB 7
SB 8
CB 9
GLA 10
GHA 11
SA 12
CA 13
VREG 14
PAD
28 CLO
27 CHI
26 BLO
25 BHI
24 ALO
23 AHI
22 FAULT
21 VDSTH
20 VDDM
19 GND
18 VBRG
17 VBB
16 CP1
15 CP2
A4919GLPx-3 variant
A4919GLPx-5 variant
A4919GLPx (No LDO) variant
terminal list table
name
LSS
GLC
GHC
SC
CC
GLB
GHB
SB
CB
GLA
GHA
SA
CA
VREG
CP2
number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Low-Side Source
Low-Side Gate Drive Phase C
High-Side Gate Drive Phase C
Motor Connection Phase C
Bootstrap Capacitor Phase C
Low-Side Gate Drive Phase B
High-Side Gate Drive Phase B
Motor Connection Phase B
Bootstrap Capacitor Phase B
Low-Side Gate Drive Phase A
High-Side Gate Drive Phase A
Motor Connection Phase A
Bootstrap Capacitor Phase A
Gate Drive Supply Output
Pump Capacitor
Function
name
CP1
VBB
VBRG
GND
V3
V5
VDDM
VDSTH
FAULT
AHI
ALO
BHI
BLO
CHI
CLO
Pad
number
16
17
18
19
20
21
22
23
24
25
26
27
28
–
Pump Capacitor
Main Power Supply
High-Side Bridge Voltage Sense
Ground
Voltage Supply (Output) – A4919GLPx-3
Voltage Supply (Output) – A4919GLPx-5
Monitor Input – A4919GLPx (No LDO)
VDS Monitor Threshold Voltage
Programmable Diagnostic Output
Phase A High-Side Control Input
Phase A Low-Side Control Input
Phase B High-Side Control Input
Phase B Low-Side Control Input
Phase C High-Side Control Input
Phase C Low-Side Control Input
Exposed Thermal Pad On Underside
Function
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A4919
Three-Phase MOSFET Driver
with Integrated Regulator
et pinout Diagrams
25 VREG
25 VREG
25 VREG
22 GHA
22 GHA
28 VBB
27 CP1
26 CP2
24 CA
23 SA
22 GHA
21 GLA
20 CB
19 SB
PAD
18 GHB
17 GLB
16 CC
15 SC
CHI 10
LSS 12
GLC 13
GHC 14
CLO 11
8
9
28 VBB
28 VBB
27 CP1
26 CP2
27 CP1
26 CP2
24 CA
24 CA
23 SA
23 SA
VBRG
GND
V3
VDSTH
FAULT
AHI
ALO
1
2
3
4
5
6
7
CHI 10
LSS 12
GLC 13
GHC 14
CLO 11
8
9
PAD
21 GLA
20 CB
19 SB
18 GHB
17 GLB
16 CC
15 SC
VBRG
GND
V5
VDSTH
FAULT
AHI
ALO
1
2
3
4
5
6
7
CHI 10
LSS 12
GLC 13
GHC 14
CLO 11
8
9
PAD
21 GLA
20 CB
19 SB
18 GHB
17 GLB
16 CC
15 SC
VBRG
GND
VDDM
VDSTH
FAULT
AHI
ALO
1
2
3
4
5
6
7
BLO
A4919GETx-3 variant
A4919GETx-5 variant
BLO
A4919GETx (No LDO) variant
terminal list table
name
VBRG
GND
V3
V5
VDDM
VDSTH
FAULT
AHI
ALO
BHI
BLO
CHI
CLO
LSS
GLC
GHC
number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Ground
Voltage Supply (Output) – A4919GETx-3
Voltage Supply (Output) – A4919GETx-5
Monitor Input – A4919GETx (No LDO)
VDS Monitor Threshold Voltage
Programmable Diagnostic Output
Phase A High-Side Control Input
Phase A Low-Side Control Input
Phase B High-Side Control Input
Phase B Low-Side Control Input
Phase C High-Side Control Input
Phase C Low-Side Control Input
Low-Side Source
Low-Side Gate Drive Phase C
High-Side Gate Drive Phase C
Function
High-Side Bridge Voltage Sense
name
SC
CC
GLB
GHB
SB
CB
GLA
GHA
SA
CA
VREG
CP2
CP1
VBB
Pad
number
15
16
17
18
19
20
21
22
23
24
25
26
27
28
–
Function
Motor Connection Phase C
Bootstrap Capacitor Phase C
Low-Side Gate Drive Phase B
High-Side Gate Drive Phase B
Motor Connection Phase B
Bootstrap Capacitor Phase B
Low-Side Gate Drive Phase A
High-Side Gate Drive Phase A
Motor Connection Phase A
Bootstrap Capacitor Phase A
Gate Drive Supply Output
Pump Capacitor
Pump Capacitor
Main Power Supply
Exposed Thermal Pad On Underside
BLO
BHI
BHI
BHI
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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