PEEL22CV10AP-10 datasheet, PDF

PEEL22CV10AP-10: DescriptionEE PLD, 10ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24; CategoryProgrammable logic devices Programmable logic; File Size899KB，12 Pages; ManufacturerAMI Semiconductor

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EE PLD, 10ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	0.300 INCH, PLASTIC, DIP-24
Reach Compliance Code	unknown
Other features	10 MACROCELLS; SHARED INPUT/CLOCK; SYNCHRONOUS PRESET; ASYNCHRONOUS CLEAR
Architecture	PAL-TYPE
maximum clock frequency	66.6 MHz
JESD-30 code	R-PDIP-T24
JESD-609 code	e0
length	31.75 mm
Dedicated input times	11
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	70 °C
Minimum operating temperature
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	10 ns
Certification status	Not Qualified
Maximum seat height	4.699 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm
Base Number Matches	1

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