2N5062 datasheet, PDF - EEWORLD Datasheet

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2N5062: Description0.8A, 100V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN; CategoryAnalog mixed-signal IC Trigger device; File Size81KB，7 Pages; ManufacturerMotorola ( NXP ); Websitehttps://www.nxp.com; Related ProductsFound19parts with similar functions to 2N5062

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2N5062 Overview

0.8A, 100V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN

2N5062 Parametric

Parameter Name	Attribute value
Parts packaging code	TO-92
package instruction	CYLINDRICAL, O-PBCY-W3
Contacts	3
Reach Compliance Code	unknown
Other features	SENSITIVE GATE
Nominal circuit commutation break time	30 µs
Configuration	SINGLE
Maximum DC gate trigger current	0.2 mA
Maximum DC gate trigger voltage	0.8 V
Maximum holding current	5 mA
JEDEC-95 code	TO-92
JESD-30 code	O-PBCY-W3
JESD-609 code	e0
Maximum leakage current	0.01 mA
On-state non-repetitive peak current	10 A
Number of components	1
Number of terminals	3
Maximum on-state voltage	1.7 V
Maximum on-state current	510 A
Maximum operating temperature	125 °C
Minimum operating temperature	-65 °C
Package body material	PLASTIC/EPOXY
Package shape	ROUND
Package form	CYLINDRICAL
Certification status	Not Qualified
Maximum rms on-state current	0.8 A
Maximum repetitive peak off-state leakage current	10 µA
Off-state repetitive peak voltage	100 V
Repeated peak reverse voltage	100 V
surface mount	NO
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	WIRE
Terminal location	BOTTOM
Trigger device type	SCR
Base Number Matches	1

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2N5060 Series

Sensitive Gate

Silicon Controlled Rectifiers

Reverse Blocking Thyristors

Annular PNPN devices designed for high volume consumer

applications such as relay and lamp drivers, small motor controls, gate

drivers for larger thyristors, and sensing and detection circuits.

Supplied in an inexpensive plastic TO-226AA (TO-92) package

which is readily adaptable for use in automatic insertion equipment.

•

Sensitive Gate Trigger Current — 200

µA

Maximum

•

Low Reverse and Forward Blocking Current — 50

µA

Maximum,

TC = 110°C

•

Low Holding Current — 5 mA Maximum

•

Passivated Surface for Reliability and Uniformity

•

Device Marking: Device Type, e.g., 2N5060, Date Code

MAXIMUM RATINGS

(TJ = 25°C unless otherwise noted)

Rating

Peak Repetitive Off–State Voltage(1)

(TJ = 40 to 110°C, Sine Wave,

50 to 60 Hz, Gate Open)

2N5060

2N5061

2N5062

2N5064

Symbol

VDRM,

VRRM

100

200

IT(RMS)

IT(AV)

0.51

0.255

ITSM

Amps

0.8

Amp

TO–92 (TO–226AA)

CASE 029

STYLE 10

Value

Unit

Volts

Preferred Device

http://onsemi.com

SCRs

0.8 AMPERES RMS

30 thru 200 VOLTS

On-State Current RMS

(180° Conduction Angles; TC = 80°C)

*Average On-State Current

(180° Conduction Angles)

(TC = 67°C)

(TC = 102°C)

*Peak Non-repetitive Surge Current,

TA = 25°C

(1/2 cycle, Sine Wave, 60 Hz)

Circuit Fusing Considerations (t = 8.3 ms)

*Forward Peak Gate Power

(Pulse Width

1.0

µsec;

TA = 25°C)

PIN ASSIGNMENT

I2t

PGM

PG(AV)

IGM

VRGM

Tstg

0.4

0.1

0.01

1.0

5.0

–40 to

+110

–40 to

+150

A2s

Watt

Cathode

Gate

Anode

*Forward Average Gate Power

(TA = 25°C, t = 8.3 ms)

*Forward Peak Gate Current

(Pulse Width

1.0

µsec;

TA = 25°C)

*Reverse Peak Gate Voltage

(Pulse Width

1.0

µsec;

TA = 25°C)

*Operating Junction Temperature Range

*Storage Temperature Range

*Indicates JEDEC Registered Data.

ORDERING INFORMATION

Amp

Volts

Preferred

devices are recommended choices for future use

and best overall value.

See detailed ordering and shipping information in the package

dimensions section on page 264 of this data sheet.

°C

(1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings

apply for zero or negative gate voltage; however, positive gate voltage shall

not be applied concurrent with negative potential on the anode. Blocking

voltages shall not be tested with a constant current source such that the

voltage ratings of the devices are exceeded.

Semiconductor Components Industries, LLC, 2000

258

May, 2000 – Rev. 4

Publication Order Number:

2N5060/D

2N5062 Related Products

	2N5062	2N5064	2N5064RLRA	2N5060	2N5060RL1	2N5060RLRA	2N5064RLRM	2N5062RLRA	2N5061RLRA	2N5060RLRM
Description	0.8A, 100V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN	0.8A, 200V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN	0.8A, 200V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN	0.8A, 30V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN	0.8A, 30V, SCR, TO-92, PLASTIC, TO-226AA, 3 PIN	Silicon Controlled Rectifier, 0.8A I(T)RMS, 30V V(DRM), 30V V(RRM), 1 Element, TO-92, PLASTIC, TO-226AA, 3 PIN	Silicon Controlled Rectifier, 0.8A I(T)RMS, 200V V(DRM), 200V V(RRM), 1 Element, TO-92, PLASTIC, TO-226AA, 3 PIN	Silicon Controlled Rectifier, 0.8A I(T)RMS, 510mA I(T), 100V V(DRM), 100V V(RRM), 1 Element, TO-92, PLASTIC, TO-226AA, 3 PIN	Silicon Controlled Rectifier, 0.8A I(T)RMS, 510mA I(T), 60V V(DRM), 60V V(RRM), 1 Element, TO-92, PLASTIC, TO-226AA, 3 PIN	Silicon Controlled Rectifier, 0.8A I(T)RMS, 30V V(DRM), 30V V(RRM), 1 Element, TO-92, PLASTIC, TO-226AA, 3 PIN
package instruction	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3	CYLINDRICAL, O-PBCY-W3
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Other features	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE	SENSITIVE GATE
Configuration	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE	SINGLE
Maximum DC gate trigger current	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA	0.2 mA
JEDEC-95 code	TO-92	TO-92	TO-92	TO-92	TO-92	TO-92	TO-92	TO-92	TO-92	TO-92
JESD-30 code	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3	O-PBCY-W3
Number of components	1	1	1	1	1	1	1	1	1	1
Number of terminals	3	3	3	3	3	3	3	3	3	3
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
Package shape	ROUND	ROUND	ROUND	ROUND	ROUND	ROUND	ROUND	ROUND	ROUND	ROUND
Package form	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL	CYLINDRICAL
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum rms on-state current	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A	0.8 A
Off-state repetitive peak voltage	100 V	200 V	200 V	30 V	30 V	30 V	200 V	100 V	60 V	30 V
Repeated peak reverse voltage	100 V	200 V	200 V	30 V	30 V	30 V	200 V	100 V	60 V	30 V
surface mount	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
Terminal form	WIRE	WIRE	WIRE	WIRE	WIRE	WIRE	WIRE	WIRE	WIRE	WIRE
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Trigger device type	SCR	SCR	SCR	SCR	SCR	SCR	SCR	SCR	SCR	SCR
Base Number Matches	1	1	1	1	1	1	1	1	1	1
Nominal circuit commutation break time	30 µs	30 µs	30 µs	10 µs	-	-	-	30 µs	10 µs	-
Maximum DC gate trigger voltage	0.8 V	0.8 V	0.8 V	0.8 V	-	-	-	0.8 V	0.8 V	-
Maximum holding current	5 mA	5 mA	5 mA	5 mA	-	-	-	5 mA	5 mA	-
JESD-609 code	e0	e0	e0	e0	-	-	-	e0	e0	-
Maximum leakage current	0.01 mA	0.01 mA	0.01 mA	0.01 mA	-	-	-	0.01 mA	0.01 mA	-
On-state non-repetitive peak current	10 A	10 A	10 A	10 A	-	-	-	10 A	10 A	-
Maximum on-state voltage	1.7 V	1.7 V	1.7 V	1.7 V	-	-	-	1.7 V	1.7 V	-
Maximum on-state current	510 A	510 A	510 A	510 A	-	-	-	510 A	510 A	-
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C	-	-	-	125 °C	125 °C	-
Minimum operating temperature	-65 °C	-65 °C	-65 °C	-65 °C	-	-	-	-60 °C	-60 °C	-
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-	-	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-

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2N5062 Similar Products

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