EE PLD, 9.5 ns, PBGA256
Parameter Name | Attribute value |
Is it Rohs certified? | conform to |
Maker | Lattice |
Parts packaging code | BGA |
package instruction | LEAD FREE, FPBGA-484 |
Contacts | 484 |
Reach Compliance Code | _compli |
ECCN code | EAR99 |
Is Samacsys | N |
Other features | YES |
In-system programmable | YES |
JESD-30 code | S-PBGA-B484 |
JESD-609 code | e1 |
JTAG BST | YES |
length | 23 mm |
Humidity sensitivity level | 3 |
Dedicated input times | |
Number of I/O lines | 253 |
Number of macro cells | 512 |
Number of terminals | 484 |
organize | 0 DEDICATED INPUTS, 253 I/O |
Output function | MACROCELL |
Package body material | PLASTIC/EPOXY |
encapsulated code | BGA |
Encapsulate equivalent code | BGA484,22X22,40 |
Package shape | SQUARE |
Package form | GRID ARRAY |
Peak Reflow Temperature (Celsius) | 250 |
power supply | 2.5 V |
Programmable logic type | EE PLD |
propagation delay | 9.5 ns |
Certification status | Not Qualified |
Maximum seat height | 2.6 mm |
Maximum supply voltage | 2.7 V |
Minimum supply voltage | 2.3 V |
Nominal supply voltage | 2.5 V |
surface mount | YES |
technology | CMOS |
Terminal surface | Tin/Silver/Copper (Sn/Ag/Cu) |
Terminal form | BALL |
Terminal pitch | 1 mm |
Terminal location | BOTTOM |
Maximum time at peak reflow temperature | 40 |
width | 23 mm |
Base Number Matches | 1 |