LFEC3E-5FN484I datasheet, PDF - EEWORLD Datasheet

LFEC3E-5FN484I: DescriptionFPGA, 768 CLBS, 420 MHz, PQFP144; Categorysemiconductor Programmable logic devices; File Size10MB，163 Pages; ManufacturerLattice; Websitehttp://www.latticesemi.com

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LFEC3E-5FN484I Overview

FPGA, 768 CLBS, 420 MHz, PQFP144

Parameter Name	Attribute value
Number of functions	1
Number of terminals	144
Maximum operating temperature	85 Cel
Minimum operating temperature	0.0 Cel
Maximum supply/operating voltage	1.26 V
Minimum supply/operating voltage	1.14 V
Rated supply voltage	1.2 V
Processing package description	20 X 20 MM, TQFP-144
state	DISCONTINUED
packaging shape	SQUARE
Package Size	FLATPACK, LOW PROFILE, FINE PITCH
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
terminal coating	TIN LEAD
Terminal location	QUAD
Packaging Materials	PLASTIC/EPOXY
Temperature level	OTHER
organize	768 CLBS
Maximum FCLK clock frequency	420 MHz
Number of configurable logic modules	768
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
The maximum delay of a CLB module	0.4000 ns

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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