Integrated
Circuit
Systems, Inc.
D
UAL
LVCMOS / LVTTL-
TO
-D
IFFERENTIAL
2.5V / 3.3V LVPECL T
RANSLATOR
F
EATURES
•
2 differential 2.5V/3.3V LVPECL outputs
•
Selectable CLK0, CLK1 LVCMOS clock inputs
•
CLK0 and CLK1 can accepts the following input levels:
LVCMOS or LVTTL
•
Maximum output frequency up to 267MHz
•
Part-to-part skew: 150ps (maximum)
•
3.3V operating supply voltage
(operating range 3.135V to 3.465V)
•
2.5V operating supply voltage
(operating range 2.375V to 2.625V)
•
0°C to 70°C ambient operating temperature
•
Industrial temperature information available upon request
ICS85322
G
ENERAL
D
ESCRIPTION
The ICS85322 is a Dual LVCMOS / LVTTL-to-
Differential 2.5V / 3.3V LVPECL translator and a
HiPerClockS™
member of the HiPerClocks™ family of High Per-
formance Clocks Solutions from ICS. The
ICS85322 has selectable single ended clock in-
puts. The single ended clock input accepts LVCMOS or LVTTL
input levels and translate them to 2.5V / 3.3V LVPECL levels.
The small outline 8-pin SOIC package makes this device ideal
for applications where space, high performance and low power
are important.
,&6
B
LOCK
D
IAGRAM
CLK0
Q0
nQ0
Q1
nQ1
P
IN
A
SSIGNMENT
Q0
nQ0
Q1
nQ1
1
2
3
4
8
7
6
5
V
CC
CLK0
CLK1
V
EE
CLK1
ICS85322
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
85322AM
www.icst.com/products/hiperclocks.html
1
REV. A JULY 31, 2001
Integrated
Circuit
Systems, Inc.
D
UAL
LVCMOS / LVTTL-
TO
-D
IFFERENTIAL
2.5V / 3.3V LVPECL T
RANSLATOR
Type
Output
Output
Power
Input
Input
Power
Pullup
Pullup
Description
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Negative supply pin. Connect to ground.
LVCMOS / LVTTL clock input.
LVCMOS / LVTTL clock input.
Positive supply pin. Connect to 3.3V or 2.5V
ICS85322
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5
6
7
8
Name
Q0, nQ0
Q1, nQ1
V
EE
CLK1
CLK0
V
CC
NOTE:
Pullup
refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CLK0, CLK1
51
51
Test Conditions
Minimum
Typical
Maximum
4
Units
pF
KΩ
KΩ
85322AM
www.icst.com/products/hiperclocks.html
2
REV. A JULY 31, 2001
Integrated
Circuit
Systems, Inc.
D
UAL
LVCMOS / LVTTL-
TO
-D
IFFERENTIAL
2.5V / 3.3V LVPECL T
RANSLATOR
4.6V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
112.7°C/W (0lfpm)
ICS85322
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, V
O
Package Thermal Impedance,
θ
JA
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in
the
DC Characteristics
or
AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
I
EE
Parameter
Positive Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
Maximum
3.465
25
Units
V
mA
T
ABLE
3B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
CLK0, CLK1
CLK0, CLK1
CLK0, CLK1
CLK0, CLK1
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
3.765
1.3
5
Units
V
V
µA
µA
T
ABLE
3C. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.65
Typical
Maximum
V
CC
- 1.0
V
CC
- 1.7
0.9
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
85322AM
www.icst.com/products/hiperclocks.html
3
REV. A JULY 31, 2001
Integrated
Circuit
Systems, Inc.
D
UAL
LVCMOS / LVTTL-
TO
-D
IFFERENTIAL
2.5V / 3.3V LVPECL T
RANSLATOR
Test Conditions
ƒ
≤
267MHz
20% to 80% @ 50MHz
20% to 80% @ 50MHz
Minimum
0.6
300
300
Typical
Maximum
267
1.8
150
700
700
60
Units
MHz
ns
ps
ps
ps
%
ICS85322
T
ABLE
4A. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
f
MAX
t
PD
Parameter
Maximum Output Frequency
Propagation Delay; NOTE 1
Par t-to-Par t Skew; NOTE 2, 3
Output Rise Time
Output Fall Time
t
sk(pp)
t
R
t
F
odc
Output Duty Cycle
40
All parameters measured at 133MHz unless noted otherwise.
NOTE 1: Measured from the 50% point of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
85322AM
www.icst.com/products/hiperclocks.html
4
REV. A JULY 31, 2001
Integrated
Circuit
Systems, Inc.
D
UAL
LVCMOS / LVTTL-
TO
-D
IFFERENTIAL
2.5V / 3.3V LVPECL T
RANSLATOR
Test Conditions
Minimum
2.375
Typical
2.5
Maximum
2.625
25
Units
V
mA
ICS85322
T
ABLE
3D. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
I
EE
Parameter
Positive Supply Voltage
Power Supply Current
T
ABLE
3E. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
CLK0, CLK1
CLK0, CLK1
CLK0, CLK1
CLK0, CLK1
V
CC
= V
IN
= 2.625
V
CC
= V
IN
= 2.625
-150
Test Conditions
Minimum
1.6
-0.3
Typical
Maximum
2.925
0.9
5
Units
V
V
µA
µA
T
ABLE
3F. LVPECL DC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.65
Typical
Maximum
V
CC
- 1.0
V
CC
- 1.7
0.9
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
T
ABLE
4B. AC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= 0°C
TO
70°C
Symbol
f
MAX
t
PD
Parameter
Maximum Output Frequency
Propagation Delay; NOTE 1
Par t-to-Par t Skew; NOTE 2, 3
Output Rise Time
Output Fall Time
20% to 80% @ 50MHz
20% to 80% @ 50MHz
300
300
ƒ
≤
215MHz
0.8
Test Conditions
Minimum
Typical
Maximum
215
2
150
700
700
60
Units
MHz
ns
ps
ps
ps
%
t
sk(pp)
t
R
t
F
odc
Output Duty Cycle
40
All parameters measured at 133MHz unless noted otherwise.
NOTE 1: Measured from the 50% point of the input to the differential output crossing point.
NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65..
85322AM
www.icst.com/products/hiperclocks.html
5
REV. A JULY 31, 2001
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