Features
•
•
High Performance, Low Power Atmel
®
AVR
®
8-Bit Microcontroller
Advanced RISC Architecture
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20MIPS Throughput at 20MHz (ATmega329P/3290P)
– On-Chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
– In-System Self-programmable Flash Program Memory
• 32KBytes (ATmega329P/ATmega3290P)
– EEPROM
• 1Kbytes (ATmega329P/ATmega3290P)
– Internal SRAM
• 2Kbytes (ATmega329P/ATmega3290P)
– Write/Erase cyles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
(1)
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
JTAG (IEEE std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
– 4 x 25 Segment LCD Driver (ATmega329P)
– 4 x 40 Segment LCD Driver (ATmega3290P)
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby
I/O and Packages
– 54/69 Programmable I/O Lines
–
64/100-lead TQFP, 64-pad QFN/MLF
Speed Grade:
– ATmega329P/ATmega3290P:
• 0 - 16MHz @ 1.8 - 5.5V, 0 - 20MHz @ 2.7 - 5.5V
Temperature range:
– -40°C to 85°C Industrial
Ultra-Low Power Consumption
– Active Mode:
• 420µA at 1MHz, 1.8V
– Power-down Mode:
• 40nA at 1.8V
– Power-save Mode:
• 750nA at 1.8V
•
•
•
8-bit Atmel
Microcontroller
with 32KBytes
In-System
Programmable
Flash
ATmega329P
ATmega3290P
Preliminary
•
•
•
•
•
8021G–AVR–03/11
ATmega329P/3290P
1. Pin Configurations
Figure 1-1.
MLF/ Pinout ATmega329P
PF5 (ADC5/TMS)
PF6 (ADC6/TDO)
PF4 (ADC4/TCK)
PF7 (ADC7/TDI)
PA0 (COM0)
PA1 (COM1)
50
61
60
59
58
57
56
55
54
53
52
51
64
63
62
49
48 PA3 (COM3)
47 PA4 (SEG0)
46 PA5 (SEG1)
45 PA6 (SEG2)
44 PA7 (SEG3)
43 PG2 (SEG4)
42 PC7 (SEG5)
41 PC6 (SEG6)
40 PC5 (SEG7)
39 PC4 (SEG8)
38 PC3 (SEG9)
37 PC2 (SEG10)
36 PC1 (SEG11)
35 PC0 (SEG12)
34 PG1 (SEG13)
33 PG0 (SEG14)
(SEG15) PD7 32
LCDCAP
(RXD/PCINT0) PE0
(TXD/PCINT1) PE1
(XCK/AIN0/PCINT2) PE2
(AIN1/PCINT3) PE3
(USCK/SCL/PCINT4) PE4
(DI/SDA/PCINT5) PE5
(DO/PCINT6) PE6
(CLKO/PCINT7) PE7
(SS/PCINT8) PB0
(SCK/PCINT9) PB1
(MOSI/PCINT10) PB2
(MISO/PCINT11) PB3
(OC0A/PCINT12) PB4
(OC1A/PCINT13) PB5
(OC1B/PCINT14) PB6
1
2
INDEX CORNER
3
4
5
6
7
8
9
10
11
12
13
14
15
16
22
23
24
25
26
27
28
(OC2A/PCINT15) PB7 17
(T1/SEG24) PG3 18
(T0/SEG23) PG4 19
RESET/PG5 20
VCC 21
29
(SEG17) PD5 30
(SEG16) PD6 31
(ICP1/SEG22) PD0
(INT0/SEG21) PD1
(TOSC2) XTAL2
(TOSC1) XTAL1
(SEG20) PD2
(SEG19) PD3
Note:
The large center pad underneath the QFN/MLF packages is made of metal and internally connected to GND. It should be sol-
dered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen
from the board.
(SEG18) PD4
GND
PA2 (COM2)
PF0 (ADC0)
PF1 (ADC1)
PF2 (ADC2)
PF3 (ADC3)
AVCC
AREF
GND
GND
VCC
2
8021G–AVR–03/11
ATmega329P/3290P
Figure 1-2.
TQFP / Pinout ATmega3290P
PH7 (PCINT23/SEG36)
PH6 (PCINT22/SEG37)
PH4 (PCINT20/SEG39)
PH5 (PCINT21/SEG38)
PF5 (ADC5/TMS)
PF6 (ADC6/TDO)
PF4 (ADC4/TCK)
PF7 (ADC7/TDI)
PA0 (COM0)
PA1 (COM1)
77
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
LCDCAP
(RXD/PCINT0) PE0
(TXD/PCINT1) PE1
(XCK/AIN0/PCINT2) PE2
(AIN1/PCINT3) PE3
(USCK/SCL/PCINT4) PE4
(DI/SDA/PCINT5) PE5
(DO/PCINT6) PE6
(CLKO/PCINT7) PE7
VCC
GND
DNC
(PCINT24/SEG35) PJ0
(PCINT25/SEG34) PJ1
DNC
DNC
DNC
DNC
(SS/PCINT8) PB0
(SCK/PCINT9) PB1
(MOSI/PCINT10) PB2
(MISO/PCINT11) PB3
(OC0A/PCINT12) PB4
(OC1A/PCINT13) PB5
(OC1B/PCINT14) PB6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
76
PA2 (COM2)
PF0 (ADC0)
PF1 (ADC1)
PF2 (ADC2)
AGND
PF3 (ADC3)
AVCC
AREF
GND
DNC
DNC
DNC
DNC
DNC
VCC
75
74
INDEX CORNER
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
PA3 (COM3)
PA4 (SEG0)
PA5 (SEG1)
PA6 (SEG2)
PA7 (SEG3)
PG2 (SEG4)
PC7 (SEG5)
PC6 (SEG6)
DNC
PH3 (PCINT19/SEG7)
PH2 (PCINT18/SEG8)
PH1 (PCINT17/SEG9)
PH0 (PCINT16/SEG10)
DNC
DNC
DNC
DNC
PC5 (SEG11)
PC4 (SEG12)
PC3 (SEG13)
PC2 (SEG14)
PC1 (SEG15)
PC0 (SEG16)
PG1 (SEG17)
PG0 (SEG18)
(PCINT30/SEG27) PJ6
(ICP1/SEG26) PD0
DNC
(INT0/SEG25) PD1
(SEG24) PD2
(SEG23) PD3
(SEG22) PD4
(SEG21) PD5
(SEG20) PD6
(PCINT26/SEG31) PJ2
(PCINT27/SEG30) PJ3
(PCINT28/SEG29) PJ4
(PCINT29/SEG28) PJ5
(T1/SEG33) PG3
(T0/SEG32) PG4
(OC2A/PCINT15) PB7
(TOSC2) XTAL2
(TOSC1) XTAL1
(SEG19) PD7
DNC
DNC
RESET/PG5
GND
DNC
VCC
3
8021G–AVR–03/11
ATmega329P/3290P
2. Overview
The ATmega329P/3290P is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega329P/3290P achieves throughputs approaching 1MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
Figure 2-1.
GND
VCC
PF0 - PF7
PA0 - PA7
PC0 - PC7
PORTF DRIVERS
PORTA DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
AGND
AREF
ADC
CALIB. OSC
INTERNAL
OSCILLATOR
OSCILLATOR
JTAG TAP
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
DATA DIR.
REG. PORTH
TIMING AND
CONTROL
LCD
CONTROLLER/
DRIVER
PORTH DRIVERS
ON-CHIP DEBUG
PROGRAM
FLASH
SRAM
MCU CONTROL
REGISTER
PH0 - PH7
DATA REGISTER
PORTH
BOUNDARY-
SCAN
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
TIMER/
COUNTERS
PROGRAMMING
LOGIC
INSTRUCTION
DECODER
INTERRUPT
UNIT
XTAL1
XTAL2
DATA DIR.
REG. PORTJ
CONTROL
LINES
ALU
EEPROM
PORTJ DRIVERS
AVR CPU
STATUS
REGISTER
PJ0 - PJ6
DATA REGISTER
PORTJ
USART
UNIVERSAL
SERIAL INTERFACE
SPI
ANALOG
COMPARATOR
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG.
PORTG
DATA DIR.
REG. PORTG
+
-
PORTE DRIVERS
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PE0 - PE7
PB0 - PB7
PD0 - PD7
PG0 - PG4
The Atmel
®
AVR
®
core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two inde-
pendent registers to be accessed in one single instruction executed in one clock cycle. The
8021G–AVR–03/11
RESET
4
ATmega329P/3290P
resulting architecture is more code efficient while achieving throughputs up to ten times faster
than conventional CISC microcontrollers.
The ATmel
®
AVR
®
ATmega329P/3290P provides the following features: 32K bytes of In-System
Programmable Flash with Read-While-Write capabilities, 1Kbytes EEPROM, 2Kbyte SRAM,
54/69 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for
Boundary-scan, On-chip Debugging support and programming, a complete On-chip LCD con-
troller with internal contrast control, three flexible Timer/Counters with compare modes, internal
and external interrupts, a serial programmable USART, Universal Serial Interface with Start
Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal
Oscillator, an SPI serial port, and five software selectable power saving modes. The Idle mode
stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt system to con-
tinue functioning. The Power-down mode saves the register contents but freezes the Oscillator,
disabling all other chip functions until the next interrupt or hardware reset. In Power-save mode,
the asynchronous timer and the LCD controller continues to run, allowing the user to maintain a
timer base and operate the LCD display while the rest of the device is sleeping. The ADC Noise
Reduction mode stops the CPU and all I/O modules except asynchronous timer, LCD controller
and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crys-
tal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast
start-up combined with low-power consumption.
The device is manufactured using Atmel’s high density non-volatile memory technology. The
On-chip In-System re-Programmable (ISP) Flash allows the program memory to be repro-
grammed In-System through an SPI serial interface, by a conventional non-volatile memory
programmer, or by an On-chip Boot program running on the AVR core. The Boot program can
use any interface to download the application program in the Application Flash memory. Soft-
ware in the Boot Flash section will continue to run while the Application Flash section is updated,
providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the Atmel ATmega329P/3290P is a powerful
microcontroller that provides a highly flexible and cost effective solution to many embedded con-
trol applications.
The ATmega329P/3290P AVR is supported with a full suite of program and system develop-
ment tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit
Emulators, and Evaluation kits.
2.2
Comparison between ATmega329P, and ATmega3290P.
The ATmega329P, and ATmega3290P differ only in pin count and pinout.
Table 2-1 on page 5
summarizes the different configurations for the four devices.
Table 2-1.
Device
ATmega329P
ATmega3290P
Configuration Summary
Flash
32Kbytes
32Kbytes
EEPROM
1Kbytes
1Kbytes
RAM
2Kbytes
2Kbytes
LCD
Segments
4 x 25
4 x 40
General Purpose
I/O Pins
54
69
5
8021G–AVR–03/11