Static Column DRAM, 1MX1, 70ns, CMOS, PDIP18
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | LAPIS Semiconductor Co., Ltd. |
| package instruction | DIP, DIP18,.3 |
| Reach Compliance Code | unknown |
| Maximum access time | 70 ns |
| I/O type | SEPARATE |
| JESD-30 code | R-PDIP-T18 |
| JESD-609 code | e0 |
| memory density | 1048576 bit |
| Memory IC Type | STATIC COLUMN DRAM |
| memory width | 1 |
| Number of terminals | 18 |
| word count | 1048576 words |
| character code | 1000000 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 1MX1 |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP18,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| power supply | 5 V |
| Certification status | Not Qualified |
| refresh cycle | 512 |
| Maximum standby current | 0.001 A |
| Maximum slew rate | 0.085 mA |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| Base Number Matches | 1 |
| MSM511002A-70RS | MSM511002A-70ZS | MSM511002A-10ZS | MSM511002A-10RS | |
|---|---|---|---|---|
| Description | Static Column DRAM, 1MX1, 70ns, CMOS, PDIP18 | Static Column DRAM, 1MX1, 70ns, CMOS, PZIP20 | Static Column DRAM, 1MX1, 100ns, CMOS, PZIP20 | Static Column DRAM, 1MX1, 100ns, CMOS, PDIP18 |
| Is it Rohs certified? | incompatible | incompatible | incompatible | incompatible |
| Maker | LAPIS Semiconductor Co., Ltd. | LAPIS Semiconductor Co., Ltd. | LAPIS Semiconductor Co., Ltd. | LAPIS Semiconductor Co., Ltd. |
| package instruction | DIP, DIP18,.3 | ZIP, ZIP20,.1 | ZIP, ZIP20,.1 | DIP, DIP18,.3 |
| Reach Compliance Code | unknown | unknown | unknown | unknow |
| Maximum access time | 70 ns | 70 ns | 100 ns | 100 ns |
| I/O type | SEPARATE | SEPARATE | SEPARATE | SEPARATE |
| JESD-30 code | R-PDIP-T18 | R-PZIP-T20 | R-PZIP-T20 | R-PDIP-T18 |
| JESD-609 code | e0 | e0 | e0 | e0 |
| memory density | 1048576 bit | 1048576 bit | 1048576 bit | 1048576 bi |
| Memory IC Type | STATIC COLUMN DRAM | STATIC COLUMN DRAM | STATIC COLUMN DRAM | STATIC COLUMN DRAM |
| memory width | 1 | 1 | 1 | 1 |
| Number of terminals | 18 | 20 | 20 | 18 |
| word count | 1048576 words | 1048576 words | 1048576 words | 1048576 words |
| character code | 1000000 | 1000000 | 1000000 | 1000000 |
| Maximum operating temperature | 70 °C | 70 °C | 70 °C | 70 °C |
| organize | 1MX1 | 1MX1 | 1MX1 | 1MX1 |
| Output characteristics | 3-STATE | 3-STATE | 3-STATE | 3-STATE |
| Package body material | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY | PLASTIC/EPOXY |
| encapsulated code | DIP | ZIP | ZIP | DIP |
| Encapsulate equivalent code | DIP18,.3 | ZIP20,.1 | ZIP20,.1 | DIP18,.3 |
| Package shape | RECTANGULAR | RECTANGULAR | RECTANGULAR | RECTANGULAR |
| Package form | IN-LINE | IN-LINE | IN-LINE | IN-LINE |
| power supply | 5 V | 5 V | 5 V | 5 V |
| Certification status | Not Qualified | Not Qualified | Not Qualified | Not Qualified |
| refresh cycle | 512 | 512 | 512 | 512 |
| Maximum standby current | 0.001 A | 0.001 A | 0.001 A | 0.001 A |
| Maximum slew rate | 0.085 mA | 0.085 mA | 0.065 mA | 0.065 mA |
| Nominal supply voltage (Vsup) | 5 V | 5 V | 5 V | 5 V |
| surface mount | NO | NO | NO | NO |
| technology | CMOS | CMOS | CMOS | CMOS |
| Temperature level | COMMERCIAL | COMMERCIAL | COMMERCIAL | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) | Tin/Lead (Sn/Pb) | Tin/Lead (Sn/Pb) | Tin/Lead (Sn/Pb) |
| Terminal form | THROUGH-HOLE | THROUGH-HOLE | THROUGH-HOLE | THROUGH-HOLE |
| Terminal pitch | 2.54 mm | 1.27 mm | 1.27 mm | 2.54 mm |
| Terminal location | DUAL | ZIG-ZAG | ZIG-ZAG | DUAL |
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