STM8S208xx/STM8S207xx
Errata sheet
STM8S performance line revision X device limitations
Silicon identification
This errata sheet applies to the revision X of the STMicroelectronics STM8S performance
line products.
The full list of root part numbers is shown in
Table 2.
The products are identifiable as shown in
Table 1:
●
●
by the Revision code marked below the Sales Type on the device package
by the last three digits of the Internal Sales Type printed on the box label
Device identification
Sales type
STM8S207xxxx
STM8S208xxxx
Revision code
(1)
marked on device
X
X
Table 1.
1. Refer to
Appendix A: Revision code on device marking
for details on how to identify the Revision code on
the different packages.
Table 2.
Device summary
Reference
Part number
STM8S207MB, STM8S207RB, STM8S207R8, STM8S207R6,
STM8S207CB, STM8S207C8, STM8S207S8, STM8S207K6
STM8S208MB, STM8S208RB
STM8S207xx
STM8S208xx
December 2008
Rev 1
1/8
www.st.com
Contents
Errata sheet
Contents
1
2
Product evolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Silicon limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
2.2
2.3
2.4
HSI RC oscillator cannot be switched off in RUN mode . . . . . . . . . . . . . . . 4
LSI oscillator remains ON during Active Halt mode (MVR ON) when AWU
uses HSE/Div as input clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
TIM1_CH4 mapped on PC4 and PD7 ports by AFR4 option . . . . . . . . . . . 4
UART PE flag cannot be cleared during reception of first half of Stop bit . 5
Appendix A Revision code on device marking . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2/8
Errata sheet
Product evolution
1
Product evolution
This table summarizes the fix status.
Table 3.
Section
Section 2.1
Product evolution summary
Limitation
HSI RC oscillator cannot be switched off in
RUN mode
LSI oscillator remains ON during Active
Halt mode (MVR ON) when AWU uses
HSE/Div as input clock
TIM1_CH4 mapped on PC4 and PD7 ports
by AFR4 option
UART PE flag cannot be cleared during
reception of first half of Stop bit
Status
Section 2.2
No fix planned
Section 2.3
Section 2.4
Workaround available
3/8
Silicon limitations
Errata sheet
2
2.1
Silicon limitations
HSI RC oscillator cannot be switched off in RUN mode
Description
The HSI RC oscillator cannot be switched off in Run mode. This causes negligible extra
power consumption compared to the total consumption of the MCU in Run mode.
Workaround
No workaround available.
2.2
LSI oscillator remains ON during Active Halt mode (MVR ON)
when AWU uses HSE/Div as input clock
Description
The LSI RC oscillator is not switched off in Active Halt mode with main voltage regulator
(MVR) on, when the AWU uses high speed external clock divided by prescaler (HSE/Div)
(clock source option enabled by CKAWUSEL option bit). This causes negligible extra power
consumption compared to the total consumption of the MCU in Active Halt mode with main
voltage regulator (MVR) on.
Workaround
No workaround available.
2.3
TIM1_CH4 mapped on PC4 and PD7 ports by AFR4 option
Description
Timer 1 channel 4 (TIM1_CH4) is available both on pin PC4 and PD7 when the alternate
function remapping AFR4 option bit is set.
Workaround
No workaround available. It is recommended to only use the AFR4 Alternate function
remapping option for the 44-pin package where PC4 is not present.
4/8
Errata sheet
Silicon limitations
2.4
UART PE flag cannot be cleared during reception of first half
of Stop bit
Description
When the UART is in reception mode and a parity error (PE) occurs, the PE flag is set by
hardware. This flag cannot be cleared during the first half of the Stop bit period. If software
tries to clear the PE flag at this time, the flag is set again by hardware, generating an
unwanted interrrupt if the PIEN bit is set in the UART_CR1 register.
Workaround
Disable PE interrupts and, after the RXNE bit is set, use polling to manage the PE flag. For
example, this could be done in the RXNE interrupt service routine.
5/8
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