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PO100HSTL32ASU

Description
Interface Circuit
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size1MB,5 Pages
ManufacturerPotato Semiconductor Corporation
Websitehttp://www.potatosemi.com/
Download Datasheet Parametric Compare View All

PO100HSTL32ASU Overview

Interface Circuit

PO100HSTL32ASU Parametric

Parameter NameAttribute value
package instruction,
Reach Compliance Codeunknown
Base Number Matches1
PO100HSTL32A
www.potatosemi.com
Quad Differential LVDS/LVPECL/HSTL to LVTTL Translator
High Frequency Noise Canncellation Translator
FEATURES:
• Patented Technology
• Differential LVDS/LVPECL/HSTL to LVTTL
Translator
• Operating frequency up to 1GHz with 2pf load
• Operating frequency up to 800MHz with 5pf load
• Operating frequency up to 450MHz with 15pf load
• Very low output pin to pin skew < 150ps
• Propagation delay < 1.8ns max with 15pf load
• 2.4V to 3.6V power supply
• Industrial temperature range: –40°C to 85°C
• Available in 16-pin SOIC 150ml package
DESCRIPTION:
Potato Semiconductor’s PO100HSTL32A is
designed for world top performance using
submicron CMOS technology to achieve 1GHz
LVTTL output frequency with less than 1.8ns
propagation delay.
The
PO100HSTL32A
is a low-skew, The small
outline 16 pin package and the low skew design to
make it ideal for applica- tions which require the
translation of a clock or a data signal.
Pin Configuration
1B
1A
1Y
G
2Y
2A
2B
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
10
9
11
Logic Block Diagram
V
CC
4B
4A
4Y
G
3Y
3A
3B
4
12
2
1
6
7
10
9
14
15
3
G
G
1A
1B
2A
1Y
5
Pin Description
DIFFERENTIAL INPUT
A, B
V
ID
10 mV
G
H
X
H
X
H
X
H
X
L
ENABLES
G
X
L
X
L
X
L
H
X
L
OUTPUT
Y
H
H
?
?
L
L
H
H
Z
2B
3A
3B
4A
4B
2Y
11
3Y
–10 mV < V
ID
< 10 mV
V
ID
–10 mV
X
Open
13
4Y
Potato Semiconductor Corporation
1
01/01/10

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Description Interface Circuit Interface Circuit
Reach Compliance Code unknown unknown
Base Number Matches 1 1
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