EBE11UE6AESA-6E-F datasheet, PDF

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EBE11UE6AESA-6E-F: DescriptionDDR DRAM Module, 128MX16, 0.45ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-200; Categorystorage storage; File Size298KB，29 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en

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EBE11UE6AESA-6E-F Overview

DDR DRAM Module, 128MX16, 0.45ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-200

EBE11UE6AESA-6E-F Parametric

Parameter Name	Attribute value
Parts packaging code	SODIMM
package instruction	DIMM,
Contacts	200
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.45 ns
Other features	AUTO/SELF REFRESH; SEATED HGT-NOM; WD-MAX
JESD-30 code	R-XZMA-N200
length	67.6 mm
memory density	2147483648 bit
Memory IC Type	DDR DRAM MODULE
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	200
word count	134217728 words
character code	128000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	128MX16
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
Maximum seat height	30 mm
self refresh	YES
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal pitch	0.6 mm
Terminal location	ZIG-ZAG
width	3.8 mm
Base Number Matches	1

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DATA SHEET

1GB DDR2 SDRAM SO-DIMM

EBE11UE6AESA (128M words

64 bits, 2 Ranks)

Specifications

•

Density: 1GB

•

Organization



128M words

64 bits, 2 ranks

•

Mounting 8 pieces of 1G bits DDR2 SDRAM sealed

in FBGA

•

Package: 200-pin socket type small outline dual in

line memory module (SO-DIMM)



PCB height: 30.0mm



Lead pitch: 0.6mm



Lead-free (RoHS compliant)

(EBE11UE6AESA-xx-E)



Lead-free (RoHS compliant) and Halogen-free

(EBE11UE6AESA-xx-F)

•

Power supply: VDD

1.8V

0.1V

•

Data rate: 800Mbps/667Mbps (max.)

•

Eight internal banks for concurrent operation

(components)

•

Interface: SSTL_18

•

Burst lengths (BL): 4, 8

•

/CAS Latency (CL): 3, 4, 5, 6

•

Precharge: auto precharge option for each burst

access

•

Refresh: auto-refresh, self-refresh

•

Refresh cycles: 8192 cycles/64ms



Average refresh period

7.8µs at 0°C

≤

≤ +85°C

3.9µs at

+85°C <

≤ +95°C

•

Operating case temperature range



TC = 0°C to +95°C

Features

•

Double-data-rate architecture; two data transfers per

clock cycle

•

The high-speed data transfer is realized by the 4 bits

prefetch pipelined architecture

•

Bi-directional differential data strobe (DQS and /DQS)

is transmitted/received with data for capturing data at

the receiver

•

DQS is edge-aligned with data for READs; center-

aligned with data for WRITEs

•

Differential clock inputs (CK and /CK)

•

DLL aligns DQ and DQS transitions with CK

transitions

•

Commands entered on each positive CK edge; data

and data mask referenced to both edges of DQS

•

Data mask (DM) for write data

•

Posted /CAS by programmable additive latency for

better command and data bus efficiency

•

Off-Chip-Driver Impedance Adjustment and On-Die-

Termination for better signal quality

•

/DQS can be disabled for single-ended Data Strobe

operation

Document No. E1297E40 (Ver. 4.0)

Date Published January 2009 (K) Japan

Printed in Japan

URL: http://www.elpida.com

Elpida

Memory, Inc. 2008-2009

EBE11UE6AESA-6E-F Related Products

	EBE11UE6AESA-6E-F	EBE11UE6AESA-8G-E	EBE11UE6AESA-6E-E	EBE11UE6AESA-8G-F
Description	DDR DRAM Module, 128MX16, 0.45ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-200	DDR DRAM Module, 128MX16, 0.4ns, CMOS, ROHS COMPLIANT, SODIMM-200	DDR DRAM Module, 128MX16, 0.45ns, CMOS, ROHS COMPLIANT, SODIMM-200	DDR DRAM Module, 128MX16, 0.4ns, CMOS, HALOGEN FREE AND ROHS COMPLIANT, SODIMM-200
Parts packaging code	SODIMM	SODIMM	SODIMM	SODIMM
package instruction	DIMM,	DIMM,	DIMM,	DIMM,
Contacts	200	200	200	200
Reach Compliance Code	unknown	unknown	unknown	unknown
ECCN code	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
Maximum access time	0.45 ns	0.4 ns	0.45 ns	0.4 ns
Other features	AUTO/SELF REFRESH; SEATED HGT-NOM; WD-MAX	AUTO/SELF REFRESH; SEATED HGT-NOM; WD-MAX	AUTO/SELF REFRESH; SEATED HGT-NOM; WD-MAX	AUTO/SELF REFRESH; SEATED HGT-NOM; WD-MAX
JESD-30 code	R-XZMA-N200	R-XZMA-N200	R-XZMA-N200	R-XZMA-N200
length	67.6 mm	67.6 mm	67.6 mm	67.6 mm
memory density	2147483648 bit	2147483648 bit	2147483648 bit	2147483648 bit
Memory IC Type	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE	DDR DRAM MODULE
memory width	16	16	16	16
Number of functions	1	1	1	1
Number of ports	1	1	1	1
Number of terminals	200	200	200	200
word count	134217728 words	134217728 words	134217728 words	134217728 words
character code	128000000	128000000	128000000	128000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
organize	128MX16	128MX16	128MX16	128MX16
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	DIMM	DIMM	DIMM	DIMM
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	30 mm	30 mm	30 mm	30 mm
self refresh	YES	YES	YES	YES
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	OTHER	OTHER	OTHER	OTHER
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal pitch	0.6 mm	0.6 mm	0.6 mm	0.6 mm
Terminal location	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG	ZIG-ZAG
width	3.8 mm	3.8 mm	3.8 mm	3.8 mm
Maker	-	ELPIDA	ELPIDA	ELPIDA

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