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935262141112

Description
LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24
Categorylogic    logic   
File Size142KB,20 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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935262141112 Overview

LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24

935262141112 Parametric

Parameter NameAttribute value
package instructionSOP,
Reach Compliance Codeunknown
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G24
JESD-609 codee4
length15.4 mm
Logic integrated circuit typeBUS DRIVER
Number of digits10
Number of functions1
Number of ports2
Number of terminals24
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
propagation delay (tpd)11 ns
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)2.7 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width7.5 mm
Base Number Matches1
74LVC841A
10-bit transparent latch with 5 V tolerant inputs/outputs;
3-state
Rev. 4 — 2 April 2013
Product data sheet
1. General description
The 74LVC841A is a 10-bit transparent latch featuring separate D-type inputs for each
latch and 3-state outputs for bus applications. A latch enable (pin LE) input and an output
enable (pin OE) input are common to all internal latches. The device consists of ten
transparent latches with 3-state true outputs. When pin LE is HIGH, data at the Dn inputs
enters the latches. In this condition, the latches are transparent, that is, a latch output
changes each time its corresponding D-input changes. When pin LE is LOW, the latches
store the information that was present at the D-inputs a set-up time preceding the HIGH to
LOW transition of pin LE.
When pin OE is LOW, the contents of the ten latches are available at the outputs. When
pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the pin OE
input does not affect the state of the latches.
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be
applied to the outputs. These features allow the use of these devices as translators in
mixed 3.3 V and 5 V applications.
2. Features and benefits
5 V tolerant inputs/outputs; for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Flow-through pinout architecture
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from
40 C
to +85
C
and
40 C
to +125
C.

935262141112 Related Products

935262141112 C-120532 935262142112 935262142118 935275622115
Description LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24 PLUG ASSEMBLY,W/ COVER, 1.0mm FH(IEEE1386) CONNECTOR LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, 5.30 MM, PLASTIC, MO-150, SOT-340-1, SSOP-24 LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PDSO24, 5.30 MM, PLASTIC, MO-150, SOT-340-1, SSOP-24 LVC/LCX/Z SERIES, 10-BIT DRIVER, TRUE OUTPUT, PQCC24, 3.50 X 5.50 MM, 0.85 MM HEIGHT, PLASTIC, SOT-815-1, DHVQFN-24
package instruction SOP, - SSOP, SSOP, HVQCCN,
Reach Compliance Code unknown - unknow unknow unknow
series LVC/LCX/Z - LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G24 - R-PDSO-G24 R-PDSO-G24 R-PQCC-N24
JESD-609 code e4 - e4 e4 e4
length 15.4 mm - 8.2 mm 8.2 mm 5.5 mm
Logic integrated circuit type BUS DRIVER - BUS DRIVER BUS DRIVER BUS DRIVER
Number of digits 10 - 10 10 10
Number of functions 1 - 1 1 1
Number of ports 2 - 2 2 2
Number of terminals 24 - 24 24 24
Maximum operating temperature 125 °C - 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C - -40 °C -40 °C -40 °C
Output characteristics 3-STATE - 3-STATE 3-STATE 3-STATE
Output polarity TRUE - TRUE TRUE TRUE
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP - SSOP SSOP HVQCCN
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE - SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
propagation delay (tpd) 11 ns - 11 ns 11 ns 11 ns
Maximum seat height 2.65 mm - 2 mm 2 mm 1 mm
Maximum supply voltage (Vsup) 3.6 V - 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.2 V - 1.2 V 1.2 V 1.2 V
Nominal supply voltage (Vsup) 2.7 V - 2.7 V 2.7 V 2.7 V
surface mount YES - YES YES YES
technology CMOS - CMOS CMOS CMOS
Temperature level AUTOMOTIVE - AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD - NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
Terminal form GULL WING - GULL WING GULL WING NO LEAD
Terminal pitch 1.27 mm - 0.65 mm 0.65 mm 0.5 mm
Terminal location DUAL - DUAL DUAL QUAD
width 7.5 mm - 5.3 mm 5.3 mm 3.5 mm
Maker - - NXP NXP NXP

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