STM69XA, STM70X, STM80X, STM81X
5V Supervisor with Battery Switchover
FEATURES SUMMARY
■
■
■
■
■
■
■
■
■
■
■
■
5V OPERATING VOLTAGE
NVRAM SUPERVISOR FOR EXTERNAL
LPSRAM
CHIP-ENABLE GATING (STM818 only) FOR
EXTERNAL LPSRAM (7ns max PROP
DELAY)
RST AND RST OUTPUTS
200ms (TYP) t
rec
WATCHDOG TIMER - 1.6sec (TYP)
AUTOMATIC BATTERY SWITCHOVER
LOW BATTERY SUPPLY CURRENT - 0.4µA
(TYP)
POWER-FAIL COMPARATOR (PFI/PFO)
LOW SUPPLY CURRENT - 40µA (TYP)
GUARANTEED RST (RST) ASSERTION
DOWN TO V
CC
= 1.0V
OPERATING TEMPERATURE:
–40°C to 85°C (Industrial Grade)
Figure 1. Packages
8
1
SO8 (M)
TSSOP8 3x3 (DS)*
Table 1. Device Options
Watchdog
Input
STM690A
STM692A
STM703
STM704
STM802L/M
STM805L
STM817L/M
STM818L/M
STM819L/M
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
Active-
Low
RST
(1)
✔
✔
✔
✔
✔
✔
✔
✔
Active-
High
RST
(1)
Manual
Reset
Input
Battery
Switch-
over
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
Power-fail
Compar-
ator
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
✔
Chip-
Enable
Gating
Battery
Freshness
Seal
Note: 1. All RST and RST outputs are push-pull.
* Contact local ST sales office for availability.
July 2004
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STM690A/692A/703/704/802/805/817/818/819
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Logic Diagram (STM690A/692A/802/805/817) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. Logic Diagram (STM703/704/819). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. Logic Diagram (STM818). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 5. STM690A/692A/802/805/817 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. STM703/704/819 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 7. STM818 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 8. Block Diagram (STM690A/692A/802/805/817) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 9. Block Diagram (STM703/704/819) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 10.Block Diagram (STM818) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 11.Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Push-button Reset Input (STM703/704/819) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog Input (NOT available on STM703/704/819) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Back-up Battery Switchover. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4. I/O Status in Battery Back-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chip-Enable Gating (STM818 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chip Enable Input (STM818 only). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Chip Enable Output (STM818 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 12.Chip-Enable Gating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 13.Chip Enable Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Power-fail Input/Output (NOT available on STM818) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 14.Power-fail Comparator Waveform (STM817/818/819) . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15.Power-fail Comparator Waveform (STM690A/692A/703/704/802/805) . . . . . . . . . . . . . 13
Using a SuperCap™ as a Backup Power Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16.Using a SuperCap™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Negative-Going V
CC
Transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Battery Freshness Seal (STM817/818/819) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17.Freshness Seal Enable Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18.V
BAT
-to-V
OUT
On-Resistance vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19.Supply Current vs. Temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20.V
PFI
Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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STM690A/692A/703/704/802/805/817/818/819
Figure 21.Reset Comparator Propagation Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22.Power-up t
rec
vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23.Normalized Reset Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 24.Watchdog Time-out Period vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25.E to E
CON
On-Resistance vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 26.PFI to PFO Propagation Delay vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 27.RST Output Voltage vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 28.RST Output Voltage vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 29.RST Response Time (Assertion). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 30.RST Response Time (Assertion). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 31.Power-fail Comparator Response Time (Assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 32.Power-fail Comparator Response Time (De-Assertion) . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 33.V
CC
to Reset Propagation Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 34.Maximum Transient Duration vs. Reset Threshold Overdrive. . . . . . . . . . . . . . . . . . . . . 22
Figure 35.E to E
CON
Propagation Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 5. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DC and AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 6. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . .
Figure 36.E to ECON Propagation Delay Test Circuit. . . . . . . . . . . . . . . . . . . . . . . . .
Figure 37.AC Testing Input/Output Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 38.MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 39.Watchdog Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Table 7. DC and AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
......
......
......
......
......
......
. . . . 23
. . . . 24
. . . . 24
. . . . 24
. . . . 24
. . . . 25
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 40.SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mech. Drawing. . . . 28
Table 8. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data . . 28
Figure 41.TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Outline . . . . . . . . . . . 29
Table 9. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Mechanical Data . . . . 29
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 10. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 11. Marking Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 12. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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STM690A/692A/703/704/802/805/817/818/819
SUMMARY DESCRIPTION
The STMXXX SUPERVISORs are self-contained
devices which provide microprocessor superviso-
ry functions with the ability to non-volatize and
write-protect external LPSRAM. A precision volt-
age reference and comparator monitors the V
CC
input for an out-of-tolerance condition. When an
invalid V
CC
condition occurs, the reset output
(RST) is forced low (or high in the case of RST).
These devices also offer a watchdog timer (except
for STM703/704/819) as well as a power-fail com-
parator (except for STM818) to provide the system
with an early warning of impending power failure.
These devices are available in a standard 8-pin
SOIC package or a space-saving 8-pin TSSOP
package.
Figure 2. Logic Diagram (STM690A/692A/802/
805/817)
V
CC
V
BAT
Figure 4. Logic Diagram (STM818)
V
CC
V
BAT
V
OUT
V
OUT
WDI
PFI
STM690A/
692A/802/
805/817
RST(RST)
(1)
PFO
WDI
STM818
E
E
CON
RST
V
SS
V
SS
Note: 1. For STM805, reset output is active-high.
AI07894
AI07896
Table 2. Signal Names
MR
WDI
Push-button Reset Input
Watchdog Input
Active-Low Reset Output
Active-High Reset Output
Chip Enable Input
Conditioned Chip Enable Output
Supply Voltage Output
Supply Voltage
Back-up Supply Voltage
Power-fail Input
Power-fail Output
Ground
Figure 3. Logic Diagram (STM703/704/819)
V
CC
V
BAT
RST
RST
V
OUT
MR
PFI
STM703
/704/819
RST
PFO
E
(1)
E
CON(1)
V
OUT
V
CC
V
SS
V
BAT
AI07895
PFI
PFO
V
SS
Note: 1. STM818
4/33
STM690A/692A/703/704/802/805/817/818/819
Figure 5. STM690A/692A/802/805/817
Connections
SO8/TSSOP8
V
OUT
V
CC
V
SS
PFI
1
2
3
4
8
7
6
5
V
BAT
RST(RST)
(1)
WDI
PFO
AI07889
Figure 6. STM703/704/819 Connections
SO8/TSSOP8
V
OUT
V
CC
V
SS
PFI
1
2
3
4
8
7
6
5
V
BAT
RST
MR
PFO
AI07890
Note: 1. For STM805, reset output is active-high.
Figure 7. STM818 Connections
SO8/TSSOP8
V
OUT
V
CC
V
SS
E
1
2
3
4
8
7
6
5
V
BAT
RST
WDI
E
CON
AI07892
Table 3. Pin Description
Pin
STM818
STM690A
STM692A
STM802
STM817
STM703
STM704
STM819
STM805
Push-button Reset Input.
A logic low on /MR asserts the reset output. Reset
remains asserted as long as MR is low and for t
rec
after MR returns high. This active-low input has an
internal pull-up. It can be driven from a TTL or
CMOS logic line, or shorted to ground with a switch.
Leave open if unused.
Watchdog Input.
If WDI remains high or low for 1.6sec, the internal
watchdog timer runs out and reset is triggered. The
internal watchdog timer clears while reset is
asserted or when WDI sees a rising or falling edge.
The watchdog function can be disabled by allowing
the WDI pin to float.
Active-Low Reset Output.
Pulses low for t
rec
when triggered, and stays low
whenever V
CC
is below the reset threshold or when
MR is a logic low. It remains low for t
rec
after either
V
CC
rises above the reset threshold, the watchdog
triggers a reset, or MR goes from low to high.
Active-High Reset Output.
Inverse of RST.
Supply Output for External LPSRAM.
When V
CC
is above the switchover voltage (V
SO
), V
OUT
is
connected to V
CC
through a P-channel MOSFET
switch. When V
CC
falls below V
SO
, V
BAT
connects
to V
OUT
. Connect to V
CC
if no battery is used.
Supply Voltage.
Name
Function
–
–
6
–
MR
6
6
–
6
WDI
7
7
7
–
RST
–
–
–
7
RST
1
1
1
1
V
OUT
2
2
2
2
V
CC
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