Features
•
Fast Read Access Time – 90 ns
•
Dual Voltage Range Operation
– Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V
±
10% Supply Range
Compatible with JEDEC Standard AT27C020
Low-power CMOS Operation
– 20 µA Max (Less than 1 µA Typical) Standby for V
CC
= 3.6V
– 29 mW Max Active at 5 MHz for V
CC
= 3.6V
Wide Selection of JEDEC Standard Packages
– 32-lead PLCC
– 32-lead TSOP
– 32-lead VSOP
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latch-up Immunity
Rapid Programming Algorithm – 100 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option
•
•
•
•
•
•
•
•
•
2-megabit
(256K x 8)
Unregulated
Battery-Voltage
High-speed
OTP EPROM
AT27BV020
1. Description
The AT27BV020 is a high-performance, low-power, low-voltage, 2,097,152-bit, one-
time programmable, read-only memory (OTP EPROM) organized as 256K by 8 bits. It
requires only one supply in the range of 2.7 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3V supply. At V
CC
= 2.7V, any byte can be
accessed in less than 90 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
CC
= 3V, the AT27BV020 consumes less than one fifth the power of a standard
5V EPROM. Standby mode supply current is typically less than 1 µA at 3V. The
AT27BV020 simplifies system design and stretches battery lifetime even further by
eliminating the need for power supply regulation
The AT27BV020 is available in industry-standard JEDEC approved one-time pro-
grammable (OTP) plastic PLCC, TSOP and VSOP packages, as well as a 42-ball,
1 mm pitch. All devices feature two-line control (CE, OE) to give designers the flexibil-
ity to prevent bus contention.
The AT27BV020 operating with V
CC
at 3.0V produces TTL level outputs that are com-
patible with standard TTL logic devices operating at V
CC
= 5.0V. At V
CC
= 2.7V, the
part is compatible with JEDEC approved low voltage battery operation (LVBO) inter-
face specifications. The device is also capable of standard 5-volt operation making it
ideally suited for dual supply range systems or card products that are pluggable in
both 3-volt and 5-volt hosts.
0902F–EPROM–12/07
Atmel's AT27BV020 has additional features to ensure high quality and efficient production use.
The Rapid Programming Algorithm reduces the time required to program the part and guaran-
tees reliable programming. Programming time is typically only 100 µs/byte. The Integrated
Product Identification Code electronically identifies the device and manufacturer. This feature is
used by industry-standard programming equipment to select the proper programming algorithms
and voltages. The AT27BV020 programs exactly the same way as a standard 5V AT27C020
and uses the same programming equipment.
2. Pin Configurations
Pin Name
A0 - A17
O0 - O7
CE
OE
PGM
NC
Function
Addresses
Outputs
Chip Enable
Output Enable
Program Strobe
No Connect
2.1
32-lead TSOP, VSOP (Type 1) Top View
A11
A9
A8
A13
A14
A17
PGM
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
A3
2.2
32-lead PLCC Top View
A12
A15
A16
VPP
VCC
PGM
A17
2
AT27BV020
0902F–EPROM–12/07
O1
O2
GND
O3
O4
O5
O6
14
15
16
17
18
19
20
A7
A6
A5
A4
A3
A2
A1
A0
O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
O7
AT27BV020
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient
voltage excursions. Unless accommodated by the system design, these transients may exceed
datasheet limits, resulting in device nonconformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor
should be connected between the V
CC
and Ground terminals of the device, as close to the
device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards
with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again con-
nected between the V
CC
and Ground terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected to the array.
4. Block Diagram
5. Absolute Maximum Ratings*
Temperature under Bias .................................. -40°C to +85°C
Storage Temperature ..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
Note:
1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns.Maximum output pin voltage is
V
CC
+ 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
overshoot to +7.0V for pulses of less than 20 ns.
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
3
0902F–EPROM–12/07
6. Operating Modes
Mode/Pin
Read
(2)
Output Disable
(2)
Standby
(2)
Rapid Program
(3)
PGM Verify
(3)
PGM Inhibit
(3)
Product Identification
(3)(5)
Notes:
1. X Can be V
IL
or V
IH
.
2. Read, output disable, and standby modes require, 2.7V
≤
V
CC
≤
3.6V, or 4.5V
≤
V
CC
≤
5.5V.
3. Refer to Programming Characteristics. Programming modes requires V
CC
= 6.5V.
4. V
H
= 12.0 ± 0.5V.
5. Two identifier bytes may be selected. All Ai inputs are held low (V
IL
), except A9 which is set to V
H
and A0 which is toggled
low (V
IL
) to select the Manufacturer’s Identification byte and high (V
IH
) to select the Device Code byte.
CE
V
IL
X
V
IH
V
IL
V
IL
V
IH
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
X
V
IL
PGM
X
(1)
X
X
V
IL
V
IH
X
X
Ai
Ai
X
X
Ai
Ai
X
A9 = V
H(4)
A0 = V
IH
or V
IL
A1 - A17 = V
IL
V
PP
X
X
X
V
PP
V
PP
V
PP
X
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
Outputs
D
OUT
High-Z
High-Z
D
IN
D
OUT
High-Z
Identification Code
7. DC and AC Operating Conditions for Read Operation
AT27BV020-90
Industrial Operating Temperature (Case)
V
CC
Power Supply
-40°C - 85°C
2.7V to 3.6V
5V ± 10%
4
AT27BV020
0902F–EPROM–12/07
AT27BV020
8. DC and Operating Characteristics for Read Operation
Symbol
Parameter
Condition
Min
Max
Units
V
CC
= 2.7V to 3.6V
I
LI
I
LO
I
PP1(2)
I
SB
I
CC
V
IL
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
V
CC(1)
Standby Current
V
CC
Active Current
Input Low Voltage
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS), CE = V
CC
± 0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
, V
CC
= 3.6V
V
CC
= 3.0 to 3.6V
V
CC
= 2.7 to 3.6V
Input High Voltage
V
CC
= 3.0 to 3.6V
V
CC
= 2.7 to 3.6V
I
OL
= 2.0 mA
V
OL
Output Low Voltage
I
OL
= 100 µA
I
OL
= 20 µA
I
OH
= -2.0 mA
V
OH
Output High Voltage
I
OH
= -100 µA
I
OH
= -20 µA
V
CC
= 4.5V to 5.5V
I
LI
I
LO
I
PP1(2)
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes:
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
V
CC(1)
Standby Current
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 2.1 mA
I
OH
= -400 µA
2.4
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS), CE = V
CC
±
0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
-0.6
2.0
±1
±5
10
100
1
25
0.8
V
CC
+ 0.5
0.4
µA
µA
µA
µA
mA
mA
V
V
V
V
2.4
V
CC
- 0.2
V
CC
- 0.1
-0.6
-0.6
2.0
0.7 x V
CC
±1
±5
10
20
100
8
0.8
0.2 x V
CC
V
CC
+ 0.5
V
CC
+ 0.5
0.4
0.2
0.1
µA
µA
µA
µA
µA
mA
V
V
V
V
V
V
V
V
V
V
V
IH
1. V
CC
must be applied simultaneously with or before V
PP
, and removed simultaneously with or after V
PP
.
2. V
PP
may be connected directly to V
CC
, expect during programming. The supply current would then be the sum of I
CC
and I
PP
.
5
0902F–EPROM–12/07
京公网安备 11010802033920号
EEWORLD
