K9F5608Q0C
K9F5608D0C
K9F5608U0C
K9F5616Q0C
K9F5616D0C
K9F5616U0C
FLASH MEMORY
Document Title
32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
Revision History
Revision No. History
0.0
1.0
Initial issue.
1.Pin assignment of TBGA dummy ball is changed.
(before) DNU --> (after) N.C
2. Add the Rp vs tr ,tf & Rp vs ibusy graph for 1.8V device (Page 36)
3. Add the data protection Vcc guidence for 1.8V device - below about
1.1V. (Page 37)
4. Add the specification of Block Lock scheme.(Page 32~35)
5. Pin assignment of TBGA A3 ball is changed.
(before) N.C --> (after) Vss
6. Pin assignment of WSOP #38 pin is changed.
(before) LOCKPRE --> (after) N.C
2.0
1. The Maximum operating current is changed.
Program : Icc2 20mA-->25mA
Erase : Icc3 20mA-->25mA
The min. Vcc value 1.8V devices is changed.
K9F56XXQ0C : Vcc 1.65V~1.95V --> 1.70V~1.95V
Pb-free Package is added.
K9F5608U0C-FCB0,FIB0
K9F5608Q0C-HCB0,HIB0
K9F5616U0C-HCB0,HIB0
K9F5616U0C-PCB0,PIB0
K9F5616Q0C-HCB0,HIB0
K9F5608U0C-HCB0,HIB0
K9F5608U0C-PCB0,PIB0
Errata is added.(Front Page)-K9F56XXQ0C
tWC tWH tWP tRC tREH tRP tREA tCEA
Specification
45 15 25 50 15 25 30
45
Relaxed value 60 20 40 60 20 40 40
55
New definition of the number of invalid blocks is added.
(Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb
memory space.)
1. The guidence of LOCKPRE pin usage is changed.
Don’t leave it N.C. Not using LOCK MECHANISM & POWER-ON AUTO-
READ, connect it Vss.(Before)
--> Not using LOCK MECHANISM & POWER-ON AUTO-READ, connect
it Vss or leave it N.C(After)
2. 2.65V device is added.
3.Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
Jan. 17th 2003
Preliminary
Draft Date
Apr. 25th 2002
Dec.14th 2002
Remark
Advance
Preliminary
2.1
Mar. 5th 2003
Preliminary
2.2
Mar. 13rd 2003
2.3
Mar. 26th 2003
2.4
Apr. 4th 2003
Jun. 30th 2003
2.5
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.samsung.com/Products/Semiconductor/Flash/TechnicalInfo/datasheets.htm
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
1
K9F5608Q0C
K9F5608D0C
K9F5608U0C
K9F5616Q0C
K9F5616D0C
K9F5616U0C
FLASH MEMORY
Document Title
32M x 8 Bit , 16M x 16 Bit NAND Flash Memory
Revision History
Revision No. History
2.6
1. tREA value of 1.8V device is changed.
K9F56XXQ0C : tREA 30ns --> 35ns
2. Errata is deleted.
1. AC parameters are changed.
tWC tWH tWP tRC tREH tRP tREA tCEA
K9F56XXU0C
K9F56XXD0C 50 15 25 50 15 25 30
45
K9F56XXQ0C
60
20
40
60
20
40
40
55
Draft Date
Aug. 18th 2003
Remark
2.7
Oct. 28th 2003
2.8
1. AC parameters are changed.
tWC tWH tWP tRC tREH tRP tREA tCEA
K9F5608Q0C 50 15 25 50 15 25 35
45
K9F5616Q0C 60 20 40 60 20 40 40
55
1. The Test Condition for Stand-by Currents are changed.
I
SB
1: CE=V
IH
, WP=0V/V
CC
-->> CE=V
IH
, WP=LOCKPRE=0V/V
CC
I
SB
2
:
CE=V
CC
-0.2, WP=0V/V
CC
-->> CE=V
CC
-0.2, WP=LOCKPRE=0V/V
CC
2. Add the Protrusion/Burr value in WSOP1 PKG Diagram.
Dec. 17th 2003
2.9
Apr. 24th 2004
3.0
3.1
1. PKG(TSOP1, WSOP1) Dimension Change
1. NAND Flash Technical Notes is changed.
-Invalid block -> initial invalid block ( page 16 )
-Error in write or read operation ( page 17 )
-Program Flow Chart ( page 17 )
2. Package: TBGA->FBGA
1. Icc 15mA -> 20mA for 1.8V device
1. The flow chart to creat the initial invalid block is changed.
May. 24th 2004
Oct. 25th. 2004
3.2
3.3
Apr. 22nd. 2005
May 6th
2005
Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.
http://www.samsung.com/Products/Semiconductor/Flash/TechnicalInfo/datasheets.htm
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right
to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have
any questions, please contact the SAMSUNG branch office near you.
2
K9F5608Q0C
K9F5608D0C
K9F5608U0C
K9F5616Q0C
K9F5616D0C
K9F5616U0C
FLASH MEMORY
32M x 8 Bit / 16M x 16 Bit NAND Flash Memory
PRODUCT LIST
Part Number
K9F5608Q0C-G,J
K9F5616Q0C-G,J
K9F5608D0C-Y,P
K9F5608D0C-G,J
K9F5616D0C-Y,P
K9F5616D0C-G,J
K9F5608U0C-Y,P
K9F5608U0C-G,J
K9F5608U0C-V,F
K9F5616U0C-Y,P
K9F5616U0C-G,J
2.7 ~ 3.6V
X16
X8
2.4 ~ 2.9V
X16
Vcc Range
1.70 ~ 1.95V
Organization
X8
X16
X8
PKG Type
FBGA
TSOP1
FBGA
TSOP1
FBGA
TSOP1
FBGA
WSOP1
TSOP1
FBGA
FEATURES
•
Voltage Supply
- 1.8V device(K9F56XXQ0C) : 1.70~1.95V
- 2.65V device(K9F56XXD0C) : 2.4~2.9V
- 3.3V device(K9F56XXU0C) : 2.7 ~ 3.6 V
•
Organization
- Memory Cell Array
- X8 device(K9F5608X0C) : (32M + 1024K)bit x 8 bit
- X16 device(K9F5616X0C) : (16M + 512K)bit x 16bit
- Data Register
- X8 device(K9F5608X0C) : (512 + 16)bit x 8bit
- X16 device(K9F5616X0C) : (256 + 8)bit x16bit
•
Automatic Program and Erase
- Page Program
- X8 device(K9F5608X0C) : (512 + 16)Byte
- X16 device(K9F5616X0C) : (256 + 8)Word
- Block Erase :
- X8 device(K9F5608X0C) : (16K + 512)Byte
- X16 device(K9F5616X0C) : ( 8K + 256)Word
•
Page Read Operation
- Page Size
- X8 device(K9F5608X0C) : (512 + 16)Byte
- X16 device(K9F5616X0C) : (256 + 8)Word
- Random Access
: 10µs(Max.)
- Serial Page Access : 50ns(Min.)*
*K9F5616Q0C : 60ns
•
Fast Write Cycle Time
- Program time : 200µs(Typ.)
- Block Erase Time : 2ms(Typ.)
•
Command/Address/Data Multiplexed I/O Port
•
Hardware Data Protection
- Program/Erase Lockout During Power Transitions
•
Reliable CMOS Floating-Gate Technology
- Endurance
: 100K Program/Erase Cycles
- Data Retention : 10 Years
•
Command Register Operation
•
Intelligent Copy-Back
•
Unique ID for Copyright Protection
•
Power-On Auto-Read Operation
•
Safe Lock Mechanism
•
Package
- K9F56XXX0C-YCB0/YIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)
- K9F56XXX0C-GCB0/GIB0
63- Ball FBGA ( 9 x 11 /0.8mm pitch , Width 1.0 mm)
- K9F5608U0C-VCB0/VIB0
48 - Pin WSOP I (12X17X0.7mm)
- K9F56XXX0C-PCB0/PIB0
48 - Pin TSOP I (12 x 20 / 0.5 mm pitch)- Pb-free Package
- K9F56XXX0C-JCB0/JIB0
63- Ball FBGA ( 9 x 11 /0.8mm pitch , Width 1.0 mm)
- Pb-free Package
- K9F5608U0C-FCB0/FIB0
48 - Pin WSOP I (12X17X0.7mm)- Pb-free Package
* K9F5608U0C-V,F(WSOPI ) is the same device as
K9F5608U0C-Y,P(TSOP1) except package type.
GENERAL DESCRIPTION
Offered in 32Mx8bit or 16Mx16bit, the K9F56XXX0C is 256M bit with spare 8M bit capacity. The device is offered in 1.8V, 2.65V, 3.3V
Vcc. Its NAND cell provides the most cost-effective solutIon for the solid state mass storage market. A program operation can be
performed in typical 200µs on a 528-byte(X8 device) or 264-word(X16 device) page and an erase operation can be performed in typ-
ical 2ms on a 16K-byte(X8 device) or 8K-word(X16 device) block. Data in the page can be read out at 50ns(K9F5616Q0C : 60ns)
cycle time per word. The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write
control automates all program and erase functions including pulse repetition, where required, and internal verification and margining
of data. Even the write-intensive systems can take advantage of the K9F56XXX0C′s extended reliability of 100K program/erase
cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm.
The K9F56XXX0C is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable
applications requiring non-volatility.
3
K9F5608Q0C
K9F5608D0C
K9F5608U0C
K9F5616Q0C
K9F5616D0C
K9F5616U0C
FLASH MEMORY
PIN CONFIGURATION (TSOP1)
K9F56XXU0C-YCB0,PCB0/YIB0,PIB0
X16
N.C
N.C
N.C
N.C
N.C
N.C
R/B
RE
CE
N.C
N.C
Vcc
Vss
N.C
N.C
CLE
ALE
WE
WP
N.C
N.C
N.C
N.C
N.C
X8
N.C
N.C
N.C
N.C
N.C
N.C
R/B
RE
CE
N.C
N.C
Vcc
Vss
N.C
N.C
CLE
ALE
WE
WP
N.C
N.C
N.C
N.C
N.C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
X8
N.C
N.C
N.C
N.C
I/O7
I/O6
I/O5
I/O4
N.C
N.C
LOCKPRE
Vcc
Vss
N.C
N.C
N.C
I/O3
I/O2
I/O1
I/O0
N.C
N.C
N.C
N.C
X16
Vss
I/O15
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
N.C
LOCKPRE
Vcc
N.C
N.C
N.C
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
Vss
PACKAGE DIMENSIONS
48-PIN LEAD/LEAD FREE PLASTIC THIN SMALL OUT-LINE PACKAGE TYPE(I)
48 - TSOP1 - 1220F
Unit :mm/Inch
0.10
MAX
0.004
#48
( 0.25 )
0.010
12.40
0.488 MAX
#24
#25
1.00
±0.05
0.039
±0.002
0.25
0.010 TYP
+0.075
20.00
±0.20
0.787
±0.008
0.20
-0.03
+0.07
#1
0.008
-0.001
0.16
-0.03
+0.07
+0.003
0.50
0.0197
12.00
0.472
0.05
0.002 MIN
0.125
0.035
0~8°
0.45~0.75
0.018~0.030
( 0.50 )
0.020
4
0.005
-0.001
+0.003
18.40
±0.10
0.724
±0.004
1.20
0.047MAX
K9F5608Q0C
K9F5608D0C
K9F5608U0C
K9F5616Q0C
K9F5616D0C
K9F5616U0C
X8
1
2
3
4
FLASH MEMORY
X16
4
PIN CONFIGURATION (FBGA)
K9F56XXX0C-GCB0,JCB0/GIB0,JIB0
5
6
N.C N.C
N.C N.C
N.C N.C
1
2
3
5
6
N.C N.C
N.C N.C
N.C N.C
A
B
C
N.C
/WP
NC
NC
NC
NC
NC
NC
Vss
ALE
/RE
NC
NC
NC
I/O0
I/O1
I/O2
Vss
CLE
NC
NC
NC
NC
NC
/CE
NC
NC
NC
NC
NC
/WE
NC
NC
NC
R/B
NC
NC
NC
A
B
C
N.C
/WP
NC
NC
NC
NC
ALE
/RE
NC
NC
NC
Vss
/CE
/WE
NC
NC
NC
R/B
NC
NC
NC
CLE NC
NC
NC
NC
NC
NC
I/O5
D
E
F
G
H
D
E
F
G
H
N.C N.C
N.C N.C
NC LOCKPRE
NC
Vcc
I/O7
Vss
I/O7 LOCKPRE
Vcc
I/O8 I/O1 I/O10 I/O12 IO14
I/O0
Vss
VccQ I/O5
I/O6
I/O9 I/O3 VccQ I/O6 I/O15
I/O2 I/O11 I/O4 I/O13 Vss
I/O3 I/O4
N.C N.C
N.C N.C
N.C N.C
N.C N.C
N.C N.C
Top View
N.C N.C
Top View
PACKAGE DIMENSIONS
63-Ball FBGA (measured in millimeters)
Top View
Bottom View
9.00
±0.10
0.80 x 9= 7.20
0.80 x 5= 4.00
9.00
±0.10
(Datum A)
A
6
0.80
5 4
3
2
1
B
#A1
A
B
0.80 x11= 8.80
0.80 x7= 5.60
2.00
0.25(Min.)
0.45
±0.05
(Datum B)
C
D
E
0.80
11.00
±0.10
2.80
F
G
H
63-∅0.45
±0.05
∅
0.20
M
A B
Side View
9.00
±0.10
0.10MAX
5
1.00(Max.)
11.00
±0.10
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