C2472, C2473 and C2474 Datasheet
RDFC Controllers for Offline Applications
ADVANTAGES
Low system component count
High average efficiency
Low standby power consumption
EMI compliance without extra components
High isolation & surge voltage withstand
High power density in very small size
C2474PW1
PDIP-8
C2472PX2
SOT23-6
FEATURES
Highly integrated CMOS controller IC
Low cost package options
Drive suitable for low cost bipolar power transistors
Resonant switching for high efficiency and low EMI
Frequency optimised for power circuit parasitics
Protection against overload, over-temperature and under-voltage
C2473PX1
SOP-8
APPLICATIONS
External AC/DC charger/adaptor (single voltage input) e.g. cordless phones, portable electric tools.
Embedded PSU (single voltage input) e.g. set-top boxes, DVD players, audio products, domestic appliances.
OVERVIEW
The C2472, C2473 and C2474 controllers use CamSemi’s Resonant Discontinuous Forward Converter
(RDFC) topology to create a high efficiency, low cost alternative to line-frequency transformer PSUs. By
operating in resonant mode, EMI is greatly reduced, enabling the replacement of linear PSUs in demanding
applications such as audio products and cordless phone chargers. The C2472, C2473 and C2474 controllers
also offer overload protection which is usually associated with more expensive switch mode solutions.
VDD
Vdd
Vdd
regulator
AUX
Switch
saturation
sensing
COL
Resonance
sensing
Base
drive
CS
Current
sensing
RDFC
Control
BAS
GND
Figure 1: Block Diagram of the C2472, C2473 and C2474 Controller ICs
Product data
© Cambridge Semiconductor Ltd 2007
Page 1 of 18
DS-1423-0709C
26-Sep-2007
C2472, C2473 and C2474
Datasheet
RDFC Controllers for Offline Applications
PIN DEFINITIONS
Figure 2: C2472, C2473 and C2474 Pin Assignment
(drawings are not to scale)
VDD Pin
The VDD pin supplies power to the controller and is maintained at the correct voltage (nominally 3.3 V) by an
internal shunt regulator.
COL Pin
The COL pin is used to sense the collector voltage of the primary switching transistor, via a c oupling
capacitor, to control the timing and current levels of the signals produced on the BAS pin.
CS Pin
The CS pin senses the primary switch current via the current sensing resistor. The voltage sensed on this
pin is used to control the operating modes to manage standby and overload protection. Operating
characteristics are programmed via two external resistors.
AUX Pin
The AUX pin provides the supply current for the internal base driver block. In most applications, the AUX pin
is connected to the external supply rail via an NPN transistor and a current-limiting resistor to set the
maximum base current; however, in low power applications the AUX pin can be connected to the VDD pin
via the limiting resistor, with some compromise on the standby power consumption.
BAS Pin
The BAS pin switches the external bipolar primary switch transistor on and off. The current supplied to the
switch transistor is controlled to minimize the switching losses and thereby help optimize overall system
efficiency.
GND Pin
GND pins provide the ground reference. Where the device has multiple GND pins, all must be connected to
a common, low impedance path.
Product data
© Cambridge Semiconductor Ltd 2007
Page 2 of 18
DS-1423-0709C
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C2472, C2473 and C2474
Datasheet
RDFC Controllers for Offline Applications
TYPICAL APPLICATION CIRCUIT
The C2472, C2473 and C2474 controllers are intended primarily for single input voltage AC/DC applications,
such as replacement of line frequency linear transformer power supplies. These versatile controllers support
a wide range of applications at low cost. A typical circuit configuration is shown in Figure 3.
Figure 3: Typical RDFC Application Schematic
Typical 12 W Charger Performance
Input
Output
Efficiency
No-load power input
115 V ac
12 V, 1 A dc
> 80%
< 150 mW
Typical Maximum Application Rated Power
Power Switch
(Q1) Gain
Standard
High
115 Vac
20 W
40 W
230 Vac
40 W
60 W
Product data
© Cambridge Semiconductor Ltd 2007
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DS-1423-0709C
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C2472, C2473 and C2474
Datasheet
RDFC Controllers for Offline Applications
PRINCIPLE OF OPERATION
Power-Up/Power-Down Sequences
The C2472, C2473 and C2474 controllers are powered via their VDD pins. When mains voltage is first
applied, a small amount of current (I
DDSLEEP
) is drawn from the rectified mains input via high value start up
resistors (Rht1 and Rht2 in Figure 3). When the voltage on the VDD pin (V
DD
) reaches a level V
OVDTHR
the
controller wakes up, demands more supply current (I
DDWAKE
) and enters the Start-up state (see Figure 4).
The controller stays in Start-up for a short time during which internal circuit blocks are enabled and then
changes to Active operation. In both Start-up and Active states, the controller uses an internal shunt
regulator to regulate the V
DD
rail voltage; the regulator is disabled in Sleep. A higher regulation voltage is
applied during Start-up (V
DDREG(S)
) than during Active operation (V
DDREG(R)
) to help provide sufficient V
DD
before the Auxiliary supply from the transformer rises to maintain V
DD
.
If the VDD pin voltage drops below V
UVDTHR
the controller goes back to Sleep, reducing the supply current
demand. The system will restart when input power is restored. To achieve a smooth power up sequence the
V
DD
reservoir capacitor needs to be large enough to sustain the supply above V
UVDTHR
over the Start-up
period.
Figure 4: VDD Pin Waveform (V
DD
) During Initial Power-up and Power-down
State
Sleep
Description
From initial application of power or from Active state if V
DD
falls below V
UVDTHR
, the
controller changes to Sleep state. Non-essential controller circuits are powered down
and the external switching transistor (Q1) is held off. Exit from Sleep state occurs when
V
DD
rises above V
OVDTHR
and the controller moves to the Start-up state.
When the Start-up state is entered, internal controller circuits are activated and power
conversion begins (Standby mode – see Table 2). In Start-up the on-chip shunt
regulator stabilises V
DD
to an intermediate value, V
DDREG(S)
. After a preset time, the
controller changes from Start-up to Active operation.
Converter operation continues, the shunt regulator controls V
DD
to the lower V
DDREG(R)
.
If V
DD
falls below V
UVDTHR
the controller ceases converter operation and reverts to
Sleep state.
Start-up
Active
Table 1: Summary of RDFC Controller States
Product data
© Cambridge Semiconductor Ltd 2007
Page 4 of 18
V
DDREG(R)
V
DDREG(S)
DS-1423-0709C
26-Sep-2007
C2472, C2473 and C2474
Datasheet
RDFC Controllers for Offline Applications
Start-up and Active State Power Conversion Modes
In the Start-up and Active states the C2472, C2473 and C2474 ICs have several modes for controlling power
conversion that are designed to achieve maximum efficiency and to limit power (current) across a wide range
of loads. Refer to Table 2 for a summary of each mode.
Mode
Standby
Typical Load
Range
I
OUT
≥ 0% to
~20% of rated
current
Description
Standby mode reduces power consumption at low loads. It achieves this by
progressively reducing the on-time then by increasing the off-time as the load
decreases. As load increases, the converter duty is increased until the controller
returns to Normal mode. Typically, mains ripple causes change of operating mode
during each mains half-cycle, with the converter moving to lower-power modes
between peaks of the mains voltage.
Normal mode is used for steady state power delivery. During Normal mode the power
device switches in a fully resonant minimum-voltage-switching waveform, with the off-
time determined by the transformer resonance (T
RES
) and the on-time being equal to
75% of the off time. A low level of primary switch current, sensed via the CS pin
voltage, causes the controller to change to Standby mode and a high level to Overload
mode.
Overload mode is activated at high output loads. In this mode the on-time of the
primary switch is terminated early (before 75% of T
RES
) when the primary current
exceeds a preset maximum, thereby protecting the primary switch and limiting the
output current. This results in reduction of the output voltage. Heavy overload (sensed
by the on-period of the primary switch reducing below a preset time) causes Foldback
mode to be entered.
Foldback mode is entered from the Overload mode. In this mode the controller reduces
the on/off duty cycle to protect the power supply and any connected load by both
shortening the on-period and increasing the off-period of the primary switch. Converter
cycles continue to maintain auxiliary power to the controller. The controller exits the
Foldback mode and enters the Power Burst mode after a fixed number of power
conversion cycles.
Power Burst mode is entered periodically from Foldback mode in order to restart the
power supply output. In Power Burst mode, the controller operates at maximum
delivered power for a set number of power converter cycles. At the end of the burst, if
the load is not excessive, the converter goes to Normal mode; otherwise it reverts to
Foldback mode.
Normal
I
OUT
> ~20% to
100% of rated
current
Overload
I
OUT
>~100%
rated current
Foldback
V
OUT
< ~70%
rated output
Power
Burst
V
OUT
< ~70%
rated output
Table 2: Summary of Active Operating Modes
When the controller goes from Sleep to Start-up state, its power conversion mode is set to Standby. Typically
the converter output voltage is low at this time so the primary switch current is high during the first few
converter cycles. This causes the operating mode to change quickly to Normal or Overload mode.
Product data
© Cambridge Semiconductor Ltd 2007
Page 5 of 18
DS-1423-0709C
26-Sep-2007
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