ARIZONA MICROTEK, INC.
AZ10ELT20
AZ100ELT20
CMOS/TTL to Differential PECL Translator
FEATURES
•
•
•
•
•
PACKAGE
0.5ns Typical Propagation Delay
Differential PECL Outputs
Flow Through Pinouts
Operating Range of +3.0V to +5.5V
Direct Replacement for ON Semi
MC10ELT20, MC100ELT20,
MC100LVELT20 & Micrel
SY89329V
Available in 2x2 and 3x3 mm MLP
Packages
IBIS Model Files Available on
Arizona Microtek Website
MLP 8 (2x2x0.75)
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead
(Pb) Free
MLP 16 (3x3)
Green / RoHS
Compliant / Lead
(Pb) Free
SOIC 8
SOIC 8
SOIC 8 Green /
RoHS Compliant /
Lead (Pb) Free
TSSOP 8 Green /
RoHS Compliant /
Lead (Pb) Free
DIE
1
2
3
4
PACKAGE AVAILABILITY
PART NUMBER
AZ100ELT20N
MARKING
TC
<Date Code>
TCG
<Date Code>
AZMG
T20
<Date Code>
AZM10
ELT20
AZM100
ELT20
AZM100G
ELT20
AZHG
LT20
N/A
NOTES
1,2
AZ100ELT20NG
1,2
AZ10/100ELT20LG
1,2
•
•
AZ10ELT20D
AZ100ELT20D
AZ100ELT20DG
1,2,3
1,2,3
1,2,3
AZ100ELT20TG
AZ10/100ELT20XP
1,2,3
4
DESCRIPTION
The
AZ10/100ELT20
is
a
CMOS/TTL to differential PECL
translator. It operates with a single power
supply of +3.0 to +5.5 volts, making it ideal for both LVCMOS/LVTTL and CMOS/TTL applications. The
extremely small MLP 8 2x2 mm package makes it ideal for those applications where space, performance and low
power are at a premium.
When the D input is left floating, the Q output is forced HIGH, and the Q output is forced LOW.
¯
The ELT20 is available in both PECL standards: the AZ10ELT20 is compatible with PECL 10K logic levels
while the AZ100ELT20 is compatible with PECL 100K logic levels.
NOTE: Specifications in the PECL tables are valid when thermal equilibrium is established.
BLOCK DIAGRAM
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K
parts) Tape & Reel.
Date code format: “Y” or “YY” for year followed by “WW” for week.
Date code “YWW” or “YYWW” on underside of part.
Waffle Pack.
Q
D
Q
1630 S. STAPLEY DR., SUITE 127
•
MESA, ARIZONA 85204
•
USA
•
(480) 962-5881
•
FAX (480) 890-2541
www.azmicrotek.com
AZ10ELT20
AZ100ELT20
Absolute Maximum Ratings are those values beyond which device life may be impaired.
Symbol
V
CC
V
IN
I
OUT
T
A
T
STG
Characteristic
DC Supply Voltage (Referenced to GND)
Input Voltage
Current Applied to Output in Low Output State
Operating Temperature Range (In Free-Air)
Storage Temperature Range
Value
0 to +8.0
0 to +6.0
50
100
-40 to +85
-65 to +150
Unit
V
V
mA
°C
°C
— Continuous
— Surge
TTL/CMOS INPUT DC CHARACTERISTICS
(GND = 0.0V, V
CC
= +3.0V to +5.5V)
Symbol
I
IH
I
IHH
I
IL
V
IK
V
IH
V
IL
Characteristic
Input HIGH Current
Input HIGH Current
Input LOW Current
Input Clamp Diode Voltage
Input HIGH Voltage
Input LOW Voltage
Min
Typ
Max
15
20
-0.1
-1.2
0.8
Unit
μA
μA
mA
V
V
V
Condition
V
IN
= 2.7V
V
IN
= V
CC
V
IN
= 0.5V
I
IN
= -18mA
2.0
10K LVPECL DC Characteristics
(GND = 0.0V, V
CC
= +3.3V)
Symbol
Characteristic
V
OH
Output HIGH Voltage
1,2
V
OL
Output LOW Voltage
1,2
I
CC
Power Supply Current
3
1.
Output parameters vary 1:1 with V
CC
.
2.
Each output is terminated through a 50Ω resistor to V
CC
– 2V.
3.
I
CC
measurements must be done with outputs open.
Min
2220
1350
-40°C
Typ
Max
2410
1650
16
Min
2280
1350
0°C
Typ
Max
2460
1670
16
Min
2320
1350
25°C
Typ
Max
2490
1670
16
Min
2390
1350
85°C
Typ
Max
2580
1705
16
Unit
mV
mV
mA
10K PECL DC Characteristics
(GND = 0.0V, V
CC
= +5.0V)
Symbol
Characteristic
V
OH
Output HIGH Voltage
1,2
V
OL
Output LOW Voltage
1,2
I
CC
Power Supply Current
3
1.
Output parameters vary 1:1 with V
CC
.
2.
Each output is terminated through a 50Ω resistor to V
CC
– 2V.
3.
I
CC
measurements must be done with outputs open.
Min
3920
3050
-40°C
Typ
Max
4110
3350
16
Min
3980
3050
0°C
Typ
Max
4160
3370
16
Min
4020
3050
25°C
Typ
Max
4190
3370
16
Min
4090
3050
85°C
Typ
Max
4280
3405
16
Unit
mV
mV
mA
100K LVPECL DC Characteristics
(GND = 0.0V, V
CC
= +3.3V)
Symbol
Characteristic
V
OH
Output HIGH Voltage
1,2
V
OL
Output LOW Voltage
1,2
I
CC
Power Supply Current
3
1.
Output parameters vary 1:1 with V
CC
.
2.
Each output is terminated through a 50Ω resistor to V
CC
– 2V.
3.
I
CC
measurements must be done with outputs open.
Min
2220
1400
-40°C
Typ
Max
2420
1750
16
Min
2275
1400
0°C
Typ
Max
2420
1680
16
Min
2275
1400
25°C
Typ
Max
2420
1680
16
Min
2275
1400
85°C
Typ
Max
2420
1680
16
Unit
mV
mV
mA
100K PECL DC Characteristics
(GND = 0.0V, V
CC
= +5.0V)
Symbol
Characteristic
V
OH
Output HIGH Voltage
1,2
V
OL
Output LOW Voltage
1,2
I
CC
Power Supply Current
3
1.
Output parameters vary 1:1 with V
CC
.
2.
Each output is terminated through a 50Ω resistor to V
CC
– 2V.
3.
I
CC
measurements must be done with outputs open.
Min
3920
3100
-40°C
Typ
Max
4120
3450
16
Min
3975
3100
0°C
Typ
Max
4120
3380
16
Min
3975
3100
25°C
Typ
Max
4120
3380
16
Min
3975
3100
85°C
Typ
Max
4120
3380
16
Unit
mV
mV
mA
April 2008 * REV - 19
www.azmicrotek.com
2
AZ10ELT20
AZ100ELT20
AC CHARACTERISTICS
(GND = 0.0V, V
CC
= +3.0V to +5.5V)
-40
0
C
0°C
25°C
85°C
Unit
Min
Max
Min
Max
Min
Typ
Max
Min
Max
t
PLH
/t
PHL
Propagation Delay
1
100
550
100
500
100
450
100
600
ps
t
r
/t
f
Output Rise/Fall Time
80
250
80
250
80
250
80
250
ps
2
f
MAX
Maximum Frequency
800
800
800
800
MHz
1.
Propagation delay is measured from +1.5V on the input to 50% of the PECL output swing. Input rise/fall times are < 1ns/V.
2.
Output at –3 dB.
Symbol
Characteristic
Condition
20-80%
850
750
Single ended Output (mV p-p)
650
550
Input: 150mV p-p Sine
Wave Single Ended
450
350
250
150
1
10
100
1000
10000
Frequency (MHz)
Large Signal Bandwidth
April 2008 * REV - 19
www.azmicrotek.com
3
AZ10ELT20
AZ100ELT20
PIN DESCRIPTION
PIN
Q, Q
¯
D
GND
V
CC
NC
10K
FUNCTION
Differential PECL Outputs
TTL/CMOS Input
Ground
Positive Supply
No Connect, Leave Open
Except as Noted
10K/100K Mode Select
AZ100ELT20N
MLP 8, 2x2mm
NC 1
Q
Q
2
3
8
7
6
V
CC
D
NC
MLP 16 (L) Package and DIE:
10K/100K Selection
Connect pin/pad 10K to GND to select
10K operation. Float (NC) pin/pad 10K
to select 100K operation. GND
connection must be less than 1Ω.
Pin 8 of the MLP 16 package may be
connected to pin 7 (GND) with no effect
on the circuit.
NC 4
TOP VIEW
5 GND
Leave Center Bottom Pad open or connect to GND.
AZ10ELT20D
AZ100ELT20D
AZ100ELT20T
AZ10/100ELT20L
NC
16
NC
15
V
CC
14
NC
13
12
NC
1
8
V
CC
Q
1
NC
D
NC
NC
Q
2
Q
3
SOIC 8
TSSOP 8
7
D
NC
NC
2
3
MLP 16
3x3mm
Top View
11
10
9
6
NC
Q
4
5
NC
4
5
GND
6
7
8
NC
10K
GND
NC
Leave Center Bottom Pad open or connect to GND.
April 2008 * REV - 19
www.azmicrotek.com
4
AZ10ELT20
AZ100ELT20
DIE PAD COORDINATES
AZ10/100ELT20 DIE:
ELT20 22
A
B
C
D
M
L
K
J
DIE SIZE: 950u X 940u
DIE THICKNESS: 14 mils
BOND PAD: 85u X 85u
I
H
G
E
F
Note: Other die thicknesses available. Contact factory for further information.
The die backside may be left open or connected to GND.
PAD CENTER COORDINATES
NAME
A
B
C
D
E
F
G
H
I
J
K
L
M
NC = No connect, leave open.
PAD DESIGNATION
NC
NC
D
NC
V
CC
V
CC
Q
Q
¯
NC
NC
NC
10K
GND
X(Microns)
-342.5
-342.5
-342.5
-342.5
-33.5
126.5
312.5
312.5
312.5
312.5
302.5
142.5
-140.5
Y(Microns)
312.5
144.5
-87.0
-255.0
-312.5
-312.5
-248.5
-98.5
51.5
201.5
342.5
342.5
342.5
April 2008 * REV - 19
www.azmicrotek.com
5
Download Centre
京公网安备 11010802033920号
EEWORLD
