NAND04GW4B2DN1E datasheet, PDF

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NAND04GW4B2DN1E: DescriptionFlash Memory; Categorystorage storage; File Size2MB，72 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/

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NAND04GW4B2DN1E Overview

Flash Memory

NAND04GW4B2DN1E Parametric

Parameter Name	Attribute value
Reach Compliance Code	unknown
Base Number Matches	1

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NAND04G-B2D, NAND08G-BxC

4-Gbit, 8-Gbit, 2112-byte/1056-word page

multiplane architecture, 1.8 V or 3 V, NAND flash memories

Features

■

High density NAND flash memory

– Up to 8 Gbits of memory array

– Cost-effective solution for mass storage

applications

NAND interface

– x8 or x16 bus width

– Multiplexed address/data

Supply voltage: 1.8 V or 3.0 V device

Page size

– x8 device: (2048 + 64 spare) bytes

– x16 device: (1024 + 32 spare) words

Block size

– x8 device: (128 K + 4 K spare) bytes

– x16 device: (64 K + 2 K spare) words

Multiplane architecture

– Array split into two independent planes

– Program/erase operations can be

performed on both planes at the same time

Page read/program

– Random access: 25 µs (max)

– Sequential access: 25 ns (min)

– Page program time: 200 µs (typ)

– Multiplane page program time (2 pages):

200 µs (typ)

Copy back program with automatic error

detection code (EDC)

Cache read mode

Fast block erase

– Block erase time: 1.5 ms (typ)

– Multiblock erase time (2 blocks):

1.5 ms (typ)

Status register

Electronic signature

Chip enable ‘don’t care’

Serial number option

NAND08G-BxC

■

TSOP48 12 x 20 mm (N)

LGA

■

LGA52 12 x 17 mm (ZL)

■

Data protection:

– Hardware program/erase disabled during

power transitions

– Non-volatile protection option

ONFI 1.0 compliant command set

Data integrity

– 100, 000 program/erase cycles (with ECC

(error correction code))

– 10 years data retention

ECOPACK

packages

Device summary

Part number

NAND04GR3B2D

■

Table 1.

Reference

■

NAND04G-B2D

NAND04GW3B2D

NAND04GR4B2D

(1)

NAND04GW4B2D

(1)

NAND08GR3B2C,

NAND08GW3B2C

NAND08GR4B2C

(1)

NAND08GW4B2C

(1)

NAND08GR3B4C

NAND08GW3B4C

■

1. x16 organization only available for MCP products.

May 2008

Rev 5

1/72

www.numonyx.com

Contents

NAND04G-B2D, NAND08G-BxC

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Memory array organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

3.10

3.11

Inputs/outputs (I/O0-I/O7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Inputs/outputs (I/O8-I/O15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Address latch enable (AL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Command latch enable (CL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Chip enable (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Read enable (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write enable (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Write protect (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Ready/Busy (RB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4.1

4.2

4.3

4.4

4.5

4.6

Command input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Address input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Data output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Write protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Command set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Device operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6.1

Read memory array . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6.1.1

6.1.2

Random read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Page read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

6.2

Cache read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2/72

NAND04G-B2D, NAND08G-BxC

Contents

6.3

Page program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

6.3.1

6.3.2

Sequential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Random data input in page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

6.4

6.5

6.6

6.7

6.8

6.9

6.10

6.11

Multiplane page program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Copy back program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Multiplane copy back program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Block erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Multiplane block erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Error detection code (EDC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Read status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

6.11.1

6.11.2

6.11.3

6.11.4

6.11.5

Write protection bit (SR7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

P/E/R controller and cache ready/busy bit (SR6) . . . . . . . . . . . . . . . . . 37

P/E/R controller bit (SR5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Error bit (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

SR4, SR3, SR2 and SR1 are reserved . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.12

6.13

6.14

6.15

6.16

Read status enhanced . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Read EDC status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Read electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Read ONFI signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Read parameter page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Concurrent operations and extended read status . . . . . . . . . . . . . . . . 45

Data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Software algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

9.1

9.2

9.3

9.4

9.5

Bad block management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

NAND flash memory failure modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Garbage collection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Wear-leveling algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Error correction code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Program and erase times and endurance cycles . . . . . . . . . . . . . . . . . 50

3/72

NAND04G-B2D, NAND08G-BxC

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Table 32.

Table 33.

Table 34.

Table 35.

Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Valid blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Address insertion (x8 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Address insertion (x16 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Address definition (x8 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Address definition (x16 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Copy back program addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Address definition for EDC units (x8 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Address definition for EDC units (x16 devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Status register bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

EDC status register bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Electronic signature byte 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Electronic signature byte 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Electronic signature byte 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Read ONFI signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Parameter page data structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Extended Read Status Register commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Block failure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Program erase times and program erase endurance cycles . . . . . . . . . . . . . . . . . . . . . . . 50

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

DC characteristics (1.8 V devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

DC characteristics (3 V devices). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

AC characteristics for command, address, data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

AC characteristics for operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

TSOP48 - 48 lead plastic thin small outline, 12 x 20 mm, package mechanical data. . . . . 68

LGA52 12 x 17 mm, 1 mm pitch, package mechanical data . . . . . . . . . . . . . . . . . . . . . . . 69

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

5/72

NAND04GW4B2DN1E Related Products

	NAND04GW4B2DN1E	NAND08GR3B4CN6F	NAND04GW3B2DN6F	NAND08GR3B4CN6E	NAND04GR4B2DN1E	NAND08GW3B4CN6F	NAND08GW3B4CN1E
Description	Flash Memory	Flash Memory	Flash, 512MX8, 25000ns, PDSO48, 12 X 20 MM, LEAD FREE, PLASTIC, TSOP-48	Flash Memory	Flash Memory	Flash Memory	Flash Memory
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
Maker	-	-	-	Micron Technology	Micron Technology	Micron Technology	Micron Technology

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