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EH3500TTS-2.4576MTR

Description
CRYSTAL OSCILLATOR, CLOCK, CMOS OUTPUT
CategoryPassive components    oscillator   
File Size954KB,10 Pages
ManufacturerECLIPTEK
Websitehttp://www.ecliptek.com
Environmental Compliance
Download Datasheet Parametric View All

EH3500TTS-2.4576MTR Overview

CRYSTAL OSCILLATOR, CLOCK, CMOS OUTPUT

EH3500TTS-2.4576MTR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Reach Compliance Codecompliant
Other featuresTRI-STATE; ENABLE/DISABLE FUNCTION; TR, 7 INCH
maximum descent time6 ns
Frequency Adjustment - MechanicalNO
frequency stability100%
JESD-609 codee4
Installation featuresSURFACE MOUNT
Nominal operating frequency2.4576 MHz
Maximum operating temperature70 °C
Minimum operating temperature
Oscillator typeCMOS
Output load10 TTL, 50 pF
physical size5.0mm x 3.2mm x 1.3mm
longest rise time6 ns
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
Ecliptek | EH35 Series Oscillator
http://www.ecliptek.com/oscillators/EH35/
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EH35 Series Oscillator
Quartz Crystal Clock Oscillators XO (SPXO) HCMOS/TTL (CMOS) 5.0Vdc 4 Pad 3.2mm x 5.0mm Ceramic Surface Mount (SMD)
2011/65 +
2015/863
168 SVHC
Revision F 02/27/2015
Electrical Specifications
Nominal Frequency
1.000MHz to 155.520MHz
Some frequencies within this range may not be available.
Frequency Tolerance/Stability
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency
Stability over the Operating Temperature Range, Supply Voltage
Change, Output Load Change, First Year Aging at 25°C, Shock, and
Vibration)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
±5ppm/year Maximum
0°C to +70°C
-40°C to +85°C
5.0V
DC
±10%
No Load
50mA Maximum
I
OH
= -16mA
2.4V
DC
Minimum with TTL Load
V
DD
-0.4V
DC
Minimum with HCMOS Load
I
OL
= +16mA
0.4V
DC
Maximum with TTL Load
0.5V
DC
Maximum with HCMOS Load
50 ±10(%) Measured at 1.4V
DC
with TTL Load or at 50% of waveform
with HCMOS Load from 1MHz to 70MHz. Measured at 50% of
waveform above 70MHz.
50 ±5(%) Measured at 50% of waveform.
Measured over 0.8V
DC
to 2.0V
DC
with TTL load or from 20% to 80% of
waveform with HCMOS load.
6nSec Maximum from 1MHz to 70MHz
4nSec Maximum from 70.000001MHz to 155.520MHz
10 TTL Load or 50pF HCMOS Load Maximum from 1MHz to 70MHz
5 TTL Load or 15pF HCMOS Load Maximum from 70.000001MHz to
155.520MHz
CMOS
Tri-State (Disabled Output: High Impedance)
+2.2V
DC
Minimum or No Connect to Enable Output
+0.8V
DC
Maximum to Disable Output (High Impedance)
±250pSec Maximum, ±100pSec Typical
Aging at 25°C
Operating Temperature Range
Supply Voltage
Input Current
Output Voltage Logic High (V
OH
)
Output Voltage Logic Low (V
OL
)
Duty Cycle
Rise Time/Fall Time
Load Drive Capability
Output Logic Type
Pin 1 Connection
Tri-State Input Voltage (Vih and Vil)
Absolute Clock Jitter
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