IC,LOGIC GATE,QUAD 2-INPUT NAND,S-TTL,DIP,14PIN,CERAMIC
Parameter Name | Attribute value |
Is it lead-free? | Contains lead |
Is it Rohs certified? | incompatible |
package instruction | DIP, |
Reach Compliance Code | unknown |
Is Samacsys | N |
series | S |
JESD-30 code | R-PDIP-T14 |
JESD-609 code | e0 |
Logic integrated circuit type | NAND GATE |
Number of functions | 4 |
Number of entries | 2 |
Number of terminals | 14 |
Maximum operating temperature | 70 °C |
Minimum operating temperature | |
Package body material | PLASTIC/EPOXY |
encapsulated code | DIP |
Package shape | RECTANGULAR |
Package form | IN-LINE |
Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
propagation delay (tpd) | 8 ns |
Maximum supply voltage (Vsup) | 5.25 V |
Minimum supply voltage (Vsup) | 4.75 V |
Nominal supply voltage (Vsup) | 5 V |
surface mount | NO |
technology | TTL |
Temperature level | COMMERCIAL |
Terminal surface | TIN LEAD |
Terminal form | THROUGH-HOLE |
Terminal location | DUAL |
Maximum time at peak reflow temperature | NOT SPECIFIED |
Base Number Matches | 1 |