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SST49LF008C-33-4C-WHE

Description
Flash, 1MX8, 11ns, PDSO32, 8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32
Categorystorage    storage   
File Size467KB,36 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance
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SST49LF008C-33-4C-WHE Overview

Flash, 1MX8, 11ns, PDSO32, 8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32

SST49LF008C-33-4C-WHE Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
Parts packaging codeTSOP1
package instruction8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32
Contacts32
Reach Compliance Codeunknown
ECCN codeEAR99
Is SamacsysN
Maximum access time11 ns
startup blockTOP
JESD-30 codeR-PDSO-G32
JESD-609 codee3
length12.4 mm
memory density8388608 bit
Memory IC TypeFLASH
memory width8
Number of functions1
Number of terminals32
word count1048576 words
character code1000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature
organize1MX8
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP1
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Programming voltage3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceMATTE TIN
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
typeNOR TYPE
width8 mm
Base Number Matches1
4 Mbit / 8 Mbit LPC Serial Flash
SST49LF004C / SST49LF008C
004C/008C4 Mb/8 Mb LPC Firmware Flash
Advance Information
FEATURES:
• Organized as 512K x8 / 1M x8
• Conforms to Intel
®
LPC Interface Specification v1.1
– Support Multi-Byte Firmware Memory Read/
Write Cycles
• Single 3.0-3.6V Read and Write Operations
• LPC Mode
– 5-signal LPC bus interface for both in-system
and factory programming using programmer
equipment
– Multi-Byte Read capability allowing 15.6 MB/s
data transfer rate @ 33 MHz PCI clock
- Firmware Memory Read cycle supporting
1, 2, 4, 16, and 128 Byte Read
- Firmware Memory Write cycle supporting
1, 2, and 4 Byte Write
– 33 MHz clock frequency operation
– WP#/AAI and TBL# pins provide hardware Write
protect for entire chip and/or top Boot Block
– Block Locking Registers for individual block Read-
Lock, Write-Lock, and Lock-Down protection
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
– Multi-Byte capability registers
(read-only registers)
– Status register for End-of-Write detection
– Program-/Erase-Suspend
Read or Write to other blocks during
Program-/Erase-Suspend
• Two-cycle Command Set
• Security ID Feature
– 256-bit Secure ID space
- 64-bit Unique Factory Pre-programmed
Device Identifier
- 192-bit User-Programmable OTP
• Low Power Consumption
– Active Read Current: 12 mA (typical)
- Standby Current: 10 µA (typical)
• Protected Data Area
– 12-KByte Protected Data Area space
– Three 4-KByte User-Programmable flash mem-
ory sectors
– Read-lock, write-lock and lock-down protection
for each sector
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Uniform 4 KByte sectors
– SST49LF004C: 11 Overlay Blocks:
- one 16-KByte Boot Block
- two 8-KByte Parameter Blocks
- one 32-Kbyte Parameter Block
- seven 64-KByte Main Blocks
– SST49LF008C: 19 Overlay Blocks:
- one 16-KByte Boot Block
- two 8-KByte Parameter Blocks
- one 32-Kbyte Parameter Block
- 15 64-KByte Main Blocks
• Fast Sector-Erase/Program Operation
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Program Time: 7 µs (typical)
• Auto Address Increment (AAI) for Rapid Factory
Programming (High Voltage Enabled)
– RY/BY# pin for End-of-Write detection
– Multi-Byte Program
– Chip Rewrite Time: (typical)
- SST49LF004C: 1 seconds
- SST49LF008C: 2 seconds
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
• All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST49LF00xC flash memory devices are designed to
interface with host controllers (chipsets) that support a low-
pin-count (LPC) interface for system firmware applications.
The SST49LF00xC device complies with Intel’s LPC Inter-
face Specification 1.1, supporting a Burst-Read (up to 128
bytes in a single operation) which enables a 15.6 MByte
per second data transfer. The LPC interface operates with
5 signal pins versus 28 pins of a 8-bit parallel flash memory.
This frees up pins on the ASIC host controller resulting in
lower ASIC costs and a reduction in overall system costs
due to simplified signal routing.
©200 Silicon Storage Technology, Inc.
S71292-00-000
1/06
1
The SST49LF00xC use a 5-signal LPC interface to support
both in-system and rapid factory programming using pro-
grammer equipment. A high voltage pin (WP#/AAI) is used
to enable Auto Address Increment (AAI) mode. The
SST49LF00xC offers hardware block protection in addition
to individual block protection via software registers for criti-
cal system code and data. A 256-bit Security ID space with
a 64-bit factory pre-programmed unique number and a
192-bit user programmable OTP area as well as 12-KByte
Protected Data Area (PDA) enhances the user’s ability to
implement new security techniques and data protection
The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc.
Intel is a registered trademark of Intel Corporation.
These specifications are subject to change without notice.

SST49LF008C-33-4C-WHE Related Products

SST49LF008C-33-4C-WHE SST49LF004C-33-4C-NHE SST49LF004C-33-4C-WHE SST49LF008C-33-4C-NHE
Description Flash, 1MX8, 11ns, PDSO32, 8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32 Flash, 512KX8, 11ns, PQCC32, ROHS COMPLIANT, PLASTIC, MS-016AE, LCC-32 Flash, 512KX8, 11ns, PDSO32, 8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32 Flash, 1MX8, 11ns, PQCC32, ROHS COMPLIANT, PLASTIC, MS-016AE, LCC-32
Is it Rohs certified? conform to conform to conform to conform to
Parts packaging code TSOP1 QFJ TSOP1 QFJ
package instruction 8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32 ROHS COMPLIANT, PLASTIC, MS-016AE, LCC-32 8 X 14 MM, ROHS COMPLIANT, MO-142BA, TSOP1-32 QCCJ,
Contacts 32 32 32 32
Reach Compliance Code unknown unknown unknown unknown
ECCN code EAR99 EAR99 EAR99 EAR99
Maximum access time 11 ns 11 ns 11 ns 11 ns
startup block TOP TOP TOP TOP
JESD-30 code R-PDSO-G32 R-PQCC-J32 R-PDSO-G32 R-PQCC-J32
JESD-609 code e3 e3 e3 e3
length 12.4 mm 13.97 mm 12.4 mm 13.97 mm
memory density 8388608 bit 4194304 bit 4194304 bit 8388608 bit
Memory IC Type FLASH FLASH FLASH FLASH
memory width 8 8 8 8
Number of functions 1 1 1 1
Number of terminals 32 32 32 32
word count 1048576 words 524288 words 524288 words 1048576 words
character code 1000000 512000 512000 1000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
organize 1MX8 512KX8 512KX8 1MX8
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP1 QCCJ TSOP1 QCCJ
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE CHIP CARRIER SMALL OUTLINE, THIN PROFILE CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 260 260 260 260
Programming voltage 3 V 3 V 3 V 3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.2 mm 3.556 mm 1.2 mm 3.556 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 3 V 3 V 3 V 3 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level OTHER OTHER OTHER OTHER
Terminal surface MATTE TIN MATTE TIN MATTE TIN MATTE TIN
Terminal form GULL WING J BEND GULL WING J BEND
Terminal pitch 0.5 mm 1.27 mm 0.5 mm 1.27 mm
Terminal location DUAL QUAD DUAL QUAD
Maximum time at peak reflow temperature 40 40 40 40
type NOR TYPE NOR TYPE NOR TYPE NOR TYPE
width 8 mm 11.43 mm 8 mm 11.43 mm
Base Number Matches 1 1 1 -
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